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This document presents the steps to setup an environment for using the EVAL-AD5629RSDZ evaluation board together with the Xilinx KC705 FPGA board, the Xilinx Embedded Development Kit (EDK) and the Micrium µC-Probe run-time monitoring tool. Below is presented a picture of the EVAL-AD5629RSDZ Evaluation Board with the Xilinx KC705 board.
For component evaluation and performance purposes, as opposed to quick prototyping, the user is directed to use the part evaluation setup. This consists of:
The SDP-B controller board is part of Analog Devices System Demonstration Platform (SDP). It provides a high speed USB 2.0 connection from the PC to the component evaluation board. The PC runs the evaluation software. Each evaluation board, which is an SDP compatible daughter board, includes the necessary installation file required for performance testing.
Note: it is expected that the analog performance on the two platforms may differ.
Below is presented a picture of SDP-B Controller Board with the EVAL-AD5629RSDZ Evaluation Board.
The AD5629R device is low power, octal, 12-bit, buffered voltage-output DAC. Device is guaranteed monotonic by design. The AD5629R has an on-chip reference with an internal gain of 2. The AD5629R-1 has a 1.25 V, 5 ppm/°C reference, giving a full-scale output range of 2.5 V. The AD5629R-2/AD5629R-3 have a 2.5 V 5 ppm/°C reference, giving a full-scale output range of 5 V depending on the option selected. Devices with 1.25 V reference selected operate from a single 2.7 V to 5.5 V supply. Devices with 2.5 V reference selected operate from 4.5 V to 5.5 V. The on-chip reference is off at power-up, allowing the use of an external reference. The internal reference is enabled via a software write. The parts incorporate a power-on reset circuit to ensure that the DAC output powers up to 0 V (AD5629R-1/AD5629R-2) or midscale (AD5629R-3) and remains powered up at this level until a valid write takes place. The part contains a power-down feature that reduces the current consumption of the device to 400 nA at 5 V and provides software-selectable output loads while in power-down mode for any or all DAC channels.
The EVAL-AD5629R evaluation board is designed to help customers quickly prototype new AD5629R circuits and reduce design time. To power the AD5629R evaluation board supply 5V between the AVDD and AGND inputs for the analog supply.
The first objective is to ensure that you have all of the items needed and to install the software tools so that you are ready to create and run the evaluation project.
The following table presents a short description the reference design archive contents.
Folder | Description |
---|---|
Bit | Contains the KC705 configuration file that can be used to program the system for quick evaluation. |
Microblaze | Contains the EDK 13.4 project for the Microblaze softcore that will be implemented in the KC705 FPGA. |
Software | Contains the source files of the software project that will be run by the Microblaze processor. |
uCProbeInterface | Contains the uCProbe interface and the .elf symbols file used by uC-Probe to access data from the Microblaze memory. |
Before connecting the ADI evaluation board to the Xilinx KC705 make sure that the VADJ_FPGA voltage of the KC705 is set to 3.3V. For more details on how to change the setting for VADJ_FPGA visit the Xilinx KC705 product page.
At this point everything is set up and it is possible to start the evaluation of the ADI hardware through the controls in the uC-Probe application provided in the reference design.
Launch uC-Probe from the Start → All Programs → Micrium → uC-Probe.
Select uC-Probe options.
Set target board communication protocol as RS-232
Setup RS-232 communication settings
The following figure presents the uC-Probe interface that can be used for monitoring and controlling the operation of the EVAL-AD5629R evaluation board.
Section A is used to activate the board and monitor activity. The communication with the board is activated / deactivated by toggling the ON/OFF switch. The Activity LED turns green when the communication is active. If the ON/OFF switch is set to ON and the Activity LED is BLACK it means that there is a communication problem with the board. See the Troubleshooting section for indications on how to fix the communication problems.
Section B is used to write/update DAC channels. The horizontal slider represents the data value and the vertical slider represents the DAC channel. An operation can be chosen by pressing one of the four buttons.
Section C is used to display the output value of any DAC channel.
Section D is used to control the LDAC and CLR pins of the AD5629R.
Section E is used to change the clear code value,to reset the DAC to the power-on reset code and to turn on or off the internal reference.
Section F is used to select one of four separate modes of operations. Any or all DACs can be powered down by pressing the corresponding button and selecting an operating mode. After any change of the buttons position is necessary to move the slider to the desired position.
Section G is used to control the LDAC register. If the button is not pressed for a DAC channel means that this channel's update is controlled by the LDAC pin. After any change of the buttons position is necessary to press the Load LDAC Reg. button.
In case there is a communication problem with the board the follwing actions can be perfomed in order to try to fix the issues: