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resources:fpga:xilinx:interposer:ad5553 [14 Feb 2012 16:23] – created Adrian Costinaresources:fpga:xilinx:interposer:ad5553 [02 Oct 2013 17:01] – [Reference Project Overview] Lucian Sin
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 ===== Evaluation Boards ===== ===== Evaluation Boards =====
  
-  * [[adi>EVAL-AD5553SDZ]]+  * [[adi>EVAL-AD5543SDZ]]
  
 ====== Overview ====== ====== Overview ======
  
-This document presents the steps to setup an environment for using the **[[adi>AD5553|EVAL-AD5553SDZ]]** evaluation board together with the Xilinx KC705 FPGA board, the Xilinx Embedded Development Kit (EDK) and the [[http://micrium.com/page/products/tools/probe|Micrium µC-Probe]] run-time monitoring tool. Below is presented a picture of the EVAL-AD5553SDZ Evaluation Board with the Xilinx KC705 board.+This document presents the steps to setup an environment for using the **[[adi>AD5553|EVAL-AD5543SDZ]]** evaluation board together with the Xilinx KC705 FPGA board and the Xilinx Embedded Development Kit (EDK). Below is presented a picture of the EVAL-AD5543SDZ Evaluation Board with the Xilinx KC705 board.
  
 {{ :resources:fpga:xilinx:interposer:img_ad5553.jpg }} {{ :resources:fpga:xilinx:interposer:img_ad5553.jpg }}
  
-For component evaluation and performance purposes, as opposed to quick prototyping, the user is directed to Analog Devices [[/resources/eval/sdp|System Demonstration Platform]] (**SDP**). The **SDP** consists of a: +{{page>common_sdp}}
-  * a controller board, like the **[[resources/eval/sdp/sdp-b|EVAL-SDP-CB1Z]] (SDP-B)** +
-  * a compatible Analog Devices SDP [[adi>sdp#exallist|product evaluation board]] +
-  * corresponding PC software +
-The EVAL-SDP-CB1Z controller board is part of Analog Devices SDP providing USB 2.0 high-speed connectivity to a PC computer running specific component evaluation software.  Each SDP evaluation daughter board includes the necessary installation files needed for this performance testing. It's expected that the analog performance on the two platforms may differ.+
  
-Below is presented a picture of **SDP-B** Controller Board with the **EVAL-AD5553SDZ** Evaluation Board.+Below is presented a picture of **SDP-B** Controller Board with the **EVAL-AD5543SDZ** Evaluation Board.
  
 {{ :resources:fpga:altera:bemicro:AD5543_blackfin.png?400 }} {{ :resources:fpga:altera:bemicro:AD5543_blackfin.png?400 }}
  
-The **EVAL-AD5553SDZ** evaluation board is designed to help customers quickly prototype new AD5553 circuits and reduce design time. +The **EVAL-AD5543SDZ** evaluation board is designed to help customers quickly prototype new AD5553 circuits and reduce design time. 
  
-The [[adi>/AD5553 | AD5553]] is a precision, 14-bit, low power, current output, small form factor, digital-to-analog converter (DAC). It is designed to operate from a single 5 V supply with a ±10 V multiplying reference. The applied external reference, VREF, determines the full-scale output current. An internal feedback resistor (RFB) facilitates the R-2R and temperature tracking for voltage conversion when combined with an external op amp.  A serial data interface offers high speed, 3-wire, microcontroller-compatible inputs using serial data input (SDI), clock (CLK), and chip select (CS).+The [[adi>AD5553]] is a precision, 14-bit, low power, current output, small form factor, digital-to-analog converter (DAC). It is designed to operate from a single 5 V supply with a ±10 V multiplying reference. The applied external reference, VREF, determines the full-scale output current. An internal feedback resistor (RFB) facilitates the R-2R and temperature tracking for voltage conversion when combined with an external op amp.  A serial data interface offers high speed, 3-wire, microcontroller-compatible inputs using serial data input (SDI), clock (CLK), and chip select (CS).
  
 ===== More information ===== ===== More information =====
   * [[adi>AD5553|AD5553 Product Info]] - pricing, samples, datasheet   * [[adi>AD5553|AD5553 Product Info]] - pricing, samples, datasheet
-  * [[adi>/static/imported-files/user_guides/UG-215.pdf|EVAL-AD5553SDZ evaluation board user guide]]+  * [[adi>/static/imported-files/user_guides/UG-215.pdf|EVAL-AD5543SDZ evaluation board user guide]]
   * [[http://www.xilinx.com/products/boards-and-kits/EK-K7-KC705-G.htm | Xilinx KC705 FPGA board]]   * [[http://www.xilinx.com/products/boards-and-kits/EK-K7-KC705-G.htm | Xilinx KC705 FPGA board]]
-  * [[http://micrium.com/page/products/tools/probe|Micrium uC-Probe]] 
  
 ====== Getting Started ====== ====== Getting Started ======
Line 44: Line 39:
   * [[http://www.xilinx.com/products/boards-and-kits/EK-K7-KC705-G.htm | Xilinx KC705 FPGA board]]   * [[http://www.xilinx.com/products/boards-and-kits/EK-K7-KC705-G.htm | Xilinx KC705 FPGA board]]
   * FMC-SDP adapter board   * FMC-SDP adapter board
-  * **EVAL-AD5553** evaluation board+  * **EVAL-AD5543SDZ** evaluation board
  
 ===== Required Software ===== ===== Required Software =====
  
-  * Xilinx ISE 13.4 (Programmer (IMPACT) is sufficient for the demo and is available on Webpack). +  * Xilinx ISE 14.6. 
-  * [[http://micrium.com/page/products/tools/probe|uC-Probe]] run-time monitoring tool+  * UART Terminal (Termite/Tera Term/Hyperterminal), baud rate 115200. 
 +  * The EVAL-AD5553 reference project for Xilinx KC705 FPGA.
  
 ===== Downloads ===== ===== Downloads =====
 +<WRAP round download 80%>
 +\\
 +  * **AD5553 Driver:** https://github.com/analogdevicesinc/no-OS/tree/master/device_drivers/AD5446
 +  * **AD5553 Commands:** https://github.com/analogdevicesinc/no-OS/tree/master/device_commands/AD5446
 +  * **Xilinx Boards Common Drivers:** https://github.com/analogdevicesinc/no-OS/tree/master/platform_drivers/Xilinx/SDP_Common
 +  * **EDK KC705 Reference project:** https://github.com/analogdevicesinc/fpgahdl_xilinx/tree/master/cf_sdp_kc705
 +\\
 +</WRAP>
  
-  * {{:resources:fpga:xilinx:interposer:ad5553_evalboard.zip|Reference Design Files}} 
  
-The following table presents a short description the reference design archive contents.+===== Hardware setup =====
  
-^ **Folder** ^ **Description** ^ +<WRAP round important 80%> 
-| Bit | Contains the KC705 configuration file that can be used to program the system for quick evaluation. | +\\ 
-| Microblaze | Contains the EDK project for the Microblaze softcore that will be implemented in the KC705 FPGA. | +Before connecting the ADI evaluation board to the Xilinx KC705 make sure that the VADJ_FPGA voltage of the KC705 is set to 3.3V. For more details on how to change the setting for VADJ_FPGA visit the Xilinx KC705 product page. 
-| Software | Contains the source files of the software project that will be run by the Microblaze processor.| +</WRAP>
-| uCProbeInterface | Contains the uCProbe interface and the .elf symbols file used by uC-Probe to access data from the Microbalze memory. | +
- +
-====== Run the Demonstration Project ====== +
- +
-===== Hardware Setup ===== +
- +
-<note important>Before connecting the ADI evaluation board to the Xilinx KC705 make sure that the VADJ_FPGA voltage of the KC705 is set to 3.3V. For more details on how to change the setting for VADJ_FPGA visit the Xilinx KC705 product page.</note>+
  
   * Use the FMC-SDP interposer to connect the ADI evaluation board to the Xilinx KC705 board on the FMC LPC connector.   * Use the FMC-SDP interposer to connect the ADI evaluation board to the Xilinx KC705 board on the FMC LPC connector.
   * Connect the JTAG and UART cables to the KC705 and power up the FPGA board.   * Connect the JTAG and UART cables to the KC705 and power up the FPGA board.
-  * Start IMPACT, and double click “//Boundary Scan//”. Right click and select //Initialize Chain//. The program should recognize the Kintex 7 device (see screenshot below). 
-{{ :resources:fpga:xilinx:interposer:impact_config.png?300 }}  
-  * Program the KC705 FPGA using the "//Bit/download.bit//" file provided in the reference design archive. 
-  * Power the ADI evaluation board. 
  
-At this point everything is set up and it is possible to start the evaluation of the ADI hardware through the controls in the uC-Probe application provided in the reference design.+<WRAP round important 80%> 
 +\\ 
 +To power on the EVAL-AD5543 evaluation board, you need to provide +10V VDD, -10V VSS and +5V DVDD to J1 connector on the board. 
 +</WRAP>
  
-===== Configure uC-Probe =====+===== Reference Project Overview ===== 
 +The following commands were implemented in this version of EVAL-AD5553 reference project for Xilinx KC705 FPGA board. 
 +^ Command ^ Description ^ 
 +| **help?** | Displays all available commands. | 
 +| **register=** | Writes to the DAC register. Accepted values:\\ 0 .. 16383 -  the value written to the DAC. | 
 +| **register?** | Displays last written value in the DAC register. | 
 +| **voltage=** | Sets the DAC output voltage. Accepted values:\\ -5000 .. 0 - desired output voltage in milivolts. | 
 +| **voltage?** | Displays last written voltage value to the DAC. |
  
-Launch **uC-Probe** from the **//Start -> All Programs -> Micrium -> uC-Probe//**.+Commands can be executed using a serial terminal connected to the UART peripheral of Xilinx KC705 FPGA.
  
-Select **uC-Probe** options. +The following image shows a generic list of commands in a serial terminal connected to Xilinx KC705 FPGA's UART peripheral. 
-  * Click on the **uC-Probe** icon on the top left portion of the screen. +{{ :resources:fpga:xilinx:interposer:Terminal_KC705.jpg? }}
-  * Click on the **//Options//** button to open the dialog box.+
  
-{{ :resources:fpga:altera:bemicro:ucprobeoptionsbtn.png?300 }} +===== Software Project Setup ===== 
- +{{page>import_workspace}}
-Set target board communication protocol as **//RS-232//** +
-  * Click on the **//Communication//** tab icon on the top left portion of the dialog box +
-  * Select the **//RS-232//** option. +
- +
-{{ :resources:fpga:xilinx:interposer:ucprobe_comm.png?300 }} +
- +
-Setup **//RS-232//** communication settings +
-  * Select the **//RS-232//** option from the **//Communication//** tab. +
-  * Select the COM port to which the KC705 board is connected. +
-  * Set the Baud Rate to 115200 bps. +
- +
-{{ :resources:fpga:xilinx:interposer:ucprobe_rs232.png?300 }} +
- +
-  * Press **//Apply//** and **//OK//** to exit the options menu. +
- +
-===== Load and Run the Demonstration Project ===== +
- +
-  * Click the **//Open//** option from the **uC-Probe** menu and select the file **//ucProbeInterface/AD5553_Interface.wsp//** provided within the reference design files. +
- +
-  * Before opening the interface **uC-Probe** will ask for a symbols file that must be associated with the interface. Select the file **//ucProbeInterface/ADIEvalBoard.elf//** to be loaded as a symbol file. +
- +
-  * Run the demonstration project by pressing the **//Play//** button. +
- +
-{{ :resources:fpga:altera:bemicro:image081.png?200 }} +
- +
-<note tip>In some cases it is possible that the uC-Probe interface will not respond to the commands the first time it is ran. In this situation just stop the interface by pressing the **//Stop//** button and run it again by pressing the **//Play//** button.</note> +
- +
-===== Demonstration Project User Interface ===== +
- +
-The following figure presents the **uC-Probe** interface that can be used for monitoring and controlling the operation of the **EVAL-AD5553SDZ** evaluation board. +
- +
-{{ :resources:fpga:altera:bemicro:ad5553interface.png?600 }} +
- +
-The communication with the board is activated / deactivated by toggling the **//ON/OFF//** switch. The **//Activity//** LED turns green when the communication is active. If the **//ON/OFF//** switch is set to ON and the **//Activity//** LED is **//BLACK//** it means that there is a communication problem with the board. See the **Troubleshooting** section for indications on how to fix the communication problems. +
- +
-The **//DAC Value//** slider is used to set the value to be loaded into the DAC register. The selected value is displayed in the numeric box next to the slider. While the communication with the board is activated the value will be sent to the DAC via SPI continuously. +
- +
-The **//Output Voltage//** numeric box will display the corresponding output voltage for the selected DAC value that can be measured on the VOUT connector. +
- +
-===== Troubleshooting ===== +
- +
-In case there is a communication problem with the board the follwing actions can be perfomed in order to try to fix the issues: +
-  * Check that the evaluation board is powered as instructed in the board's user guide. +
-  * In uC-Probe refresh the symbols file by right-clicking on the **//System Browser//** window and selecting **//Refresh Symbols//**. +
-  * If the communication problem persists even after performing the previous steps, restart the uC-Probe application and try to run the interface again.+
  
 ====== More information ====== ====== More information ======
-  * [[ez>community/fpga|ask questions about the FPGA reference design]] +  * [[resources:tools-software:linux-drivers:iio-dac:ad5446|AD5553 IIO DAC Linux Driver]] 
 +{{page>ez_common}}
resources/fpga/xilinx/interposer/ad5553.txt · Last modified: 09 Jan 2021 00:48 by Robin Getz

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