This version is outdated by a newer approved version.
This version (06 Apr 2012 15:45) was approved by Andrei Cozma.The Previously approved version (17 Feb 2012 16:10) is available.
This version (06 Apr 2012 15:45) was approved by Andrei Cozma.The Previously approved version (17 Feb 2012 16:10) is available.This is an old revision of the document!
Table of Contents
AD5272 FMC-SDP Interposer & Evaluation Board / Xilinx KC705 Reference Design
Supported Devices
Evaluation Boards
Overview
This document presents the steps to setup an environment for using the EVAL-AD5272SDZ evaluation board together with the Xilinx KC705 FPGA board, the Xilinx Embedded Development Kit (EDK) and the Micrium µC-Probe run-time monitoring tool. Below is presented a picture of the EVAL-AD5272SDZ Evaluation Board with the Xilinx KC705 board.
For component evaluation and performance purposes, as opposed to quick prototyping, the user is directed to Analog Devices System Demonstration Platform (SDP). The SDP consists of a:
- a controller board, like the EVAL-SDP-CB1Z (SDP-B)
- a compatible Analog Devices SDP product evaluation board
- corresponding PC software
The EVAL-SDP-CB1Z controller board is part of Analog Devices SDP providing USB 2.0 high-speed connectivity to a PC computer running specific component evaluation software. Each SDP evaluation daughter board includes the necessary installation files needed for this performance testing. It's expected that the analog performance on the two platforms may differ.
Below is presented a picture of SDP-B Controller Board with the EVAL-AD5272SDZ Evaluation Board.
The EVAL-AD5272SDZ evaluation board is a member of a growing number of boards available for the SDP. Designed to help customers evaluate performance or quickly prototype new AD5272 circuits and reduce design time, the EVAL-AD5272SDZ evaluation board can operate in single-supply and dual-supply mode and incorporates an internal power supply powered from the USB.
The AD5272 is a single-channel, 1024-position digital rheostat that combine industry leading variable resistor performance with nonvolatile memory (NVM) in a compact package. The AD5272 ensure less than 1% end-to-end resistor tolerance error and offer 50-times programmable (50-TP) memory. The guaranteed industry leading low resistor tolerance error feature simplifies open-loop applications as well as precision calibration and tolerance matching applications. The AD5272 device wiper settings are controllable through the I2C-compatible digital interface. Unlimited adjustments are allowed before programming the resistance value into the 50-TP memory. The AD5272 does not require any external voltage supply to facilitate fuse blow and there are 50 opportunities for permanent programming. During 50-TP activation, a permanent blow fuse command freezes the wiper position (analogous to placing epoxy on a mechanical trimmer).
More information
- AD5272 Product Info - pricing, samples, datasheet
Getting Started
The first objective is to ensure that you have all of the items needed and to install the software tools so that you are ready to create and run the evaluation project.
Required Hardware
- FMC-SDP adapter board
- EVAL-AD5272 evaluation board
Required Software
- Xilinx ISE 13.4 (Programmer (IMPACT) is sufficient for the demo and is available on Webpack).
- uC-Probe run-time monitoring tool
Downloads
The following table presents a short description the reference design archive contents.
| Folder | Description |
|---|---|
| Bit | Contains the KC705 configuration file that can be used to program the system for quick evaluation. |
| Microblaze | Contains the EDK 13.4 project for the Microblaze softcore that will be implemented in the KC705 FPGA. |
| Software | Contains the source files of the software project that will be run by the Microblaze processor. |
| uCProbeInterface | Contains the uCProbe interface and the .elf symbols file used by uC-Probe to access data from the Microbalze memory. |
Run the Demonstration Project
Hardware Setup
Before connecting the ADI evaluation board to the Xilinx KC705 make sure that the VADJ_FPGA voltage of the KC705 is set to 3.3V. For more details on how to change the setting for VADJ_FPGA visit the Xilinx KC705 product page.
- Use the FMC-SDP interposer to connect the ADI evaluation board to the Xilinx KC705 board on the FMC LPC connector.
- Connect the JTAG and UART cables to the KC705 and power up the FPGA board.
- Start IMPACT, and double click “Boundary Scan”. Right click and select Initialize Chain. The program should recognize the Kintex 7 device (see screenshot below).
- Program the KC705 FPGA using the “Bit/download.bit” file provided in the reference design archive.
- Power the ADI evaluation board.
At this point everything is set up and it is possible to start the evaluation of the ADI hardware through the controls in the uC-Probe application provided in the reference design.
Configure uC-Probe
Launch uC-Probe from the Start → All Programs → Micrium → uC-Probe.
Select uC-Probe options.
- Click on the uC-Probe icon on the top left portion of the screen.
- Click on the Options button to open the dialog box.
Set target board communication protocol as RS-232
- Click on the Communication tab icon on the top left portion of the dialog box
- Select the RS-232 option.
Setup RS-232 communication settings
- Select the RS-232 option from the Communication tab.
- Select the COM port to which the KC705 board is connected.
- Set the Baud Rate to 115200 bps.
- Press Apply and OK to exit the options menu.
Load and Run the Demonstration Project
- Click the Open option from the uC-Probe menu and select the .wsp file from the ucProbeInterface folder provided within the reference design files.
- Before opening the interface uC-Probe will ask for a symbols file that must be associated with the interface. Select the file ucProbeInterface/ADIEvalBoard.elf to be loaded as a symbol file.
- Run the demonstration project by pressing the Play button.
- In some cases it is possible that the uC-Probe interface will not respond to the commands the first time it is ran. In this situation just stop the interface by pressing the Stop button and run it again by pressing the Play button.
- After starting the uC-Probe interface wait until the status of the connection with the board displayed on the bottom of the screen is set to Connected. It is possible to use the interface only after the status is changed to Connected and the data transfer speed displayed next to the connection status is different than 0.
Demonstration Project User Interface
The following figure presents the uC-Probe interface that can be used for monitoring and controlling the operation of the EVAL-AD5272SDZ evaluation board.
Section A is used to activate the board and monitor activity. The communication with the board is activated / deactivated by toggling the ON/OFF switch. The Activity LED turns green when the communication is active. If the ON/OFF switch is set to ON and the Activity LED is BLACK it means that there is a communication problem with the board. See the Troubleshooting section for indications on how to fix the communication problems.
Section B displays the data that is read from the RDAC register.
Section C is used to write data to RDAC register.
Section D allows access to the control register, enabling or disabling the resistor performance mode, RDAC write protection, and the 50-TP memory.
- 50-TP Program – enables/disables device for 50-TP program.
- RDAC Write Protect – allows or not update of wiper position through a digital interface.
- Resistor Performance – enables/disables resistor tolerance calibration.
Section E is used to reset and to shutdown the device.
- Soft Reset – sends a reset by software.
- Hard Reset – sends a reset by hardware.
- Power Down – powers down the part.
Section F is used read/write the 50-TP memory.
- Blow Fuse – blows the actual RDAC register data in the 50-TP memory.
- Read Fuse Content – reads content of 50-TP memory.
- Read Fuse Address – reads address of the last 50-TP programmed memory location.
Troubleshooting
In case there is a communication problem with the board the follwing actions can be perfomed in order to try to fix the issues:
- Check that the evaluation board is powered as instructed in the board's user guide.
- In uC-Probe refresh the symbols file by right-clicking on the System Browser window and selecting Refresh Symbols.
- If the communication problem persists even after performing the previous steps, restart the uC-Probe application and try to run the interface again.
More information
resources/fpga/xilinx/interposer/ad5272.1333719953.txt.gz · Last modified: 06 Apr 2012 15:45 (external edit)