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resources:fpga:xilinx:interposer:ad5110 [28 Sep 2012 11:27] – Added common section for describing the evaluation setup and System Demonstration Platform Adrian Costinaresources:fpga:xilinx:interposer:ad5110 [13 Aug 2013 14:34] – [Downloads] Lucian Sin
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 ====== Overview ====== ====== Overview ======
  
-This document presents the steps to setup an environment for using the **[[adi>AD5110|EVAL-AD5110SDZ]]** evaluation board together with the Xilinx KC705 FPGA board, the Xilinx Embedded Development Kit (EDK) and the [[http://micrium.com/page/products/tools/probe|Micrium µC-Probe]] run-time monitoring tool. Below is presented a picture of the EVAL-AD5110SDZ Evaluation Board with the Xilinx KC705 board.+This document presents the steps to setup an environment for using the **[[adi>AD5110|EVAL-AD5110SDZ]]** evaluation board together with the Xilinx KC705 FPGA board and the Xilinx Embedded Development Kit (EDK). Below is presented a picture of the EVAL-AD5110SDZ Evaluation Board with the Xilinx KC705 board.
  
 {{ :resources:fpga:xilinx:interposer:ad5111_kc705.jpg?400 }} {{ :resources:fpga:xilinx:interposer:ad5111_kc705.jpg?400 }}
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   * [[adi>/static/imported-files/user_guides/UG-323.pdf|EVAL-AD5110SDZ evaluation board user guide]]   * [[adi>/static/imported-files/user_guides/UG-323.pdf|EVAL-AD5110SDZ evaluation board user guide]]
   * [[http://www.xilinx.com/products/boards-and-kits/EK-K7-KC705-G.htm | Xilinx KC705 FPGA board]]   * [[http://www.xilinx.com/products/boards-and-kits/EK-K7-KC705-G.htm | Xilinx KC705 FPGA board]]
-  * [[http://micrium.com/page/products/tools/probe|Micrium uC-Probe]] 
  
 ====== Getting Started ====== ====== Getting Started ======
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   * [[http://www.xilinx.com/products/boards-and-kits/EK-K7-KC705-G.htm | Xilinx KC705 FPGA board]]   * [[http://www.xilinx.com/products/boards-and-kits/EK-K7-KC705-G.htm | Xilinx KC705 FPGA board]]
   * FMC-SDP adapter board   * FMC-SDP adapter board
-  * **EVAL-AD5110** evaluation board+  * **EVAL-AD5110SDZ** evaluation board
  
 ===== Required Software ===== ===== Required Software =====
  
-  * Xilinx ISE 13.4 (Programmer (IMPACT) is sufficient for the demo and is available on Webpack). +  * Xilinx ISE 14.6. 
-  * [[http://micrium.com/page/products/tools/probe|uC-Probe]] run-time monitoring tool+  * UART Terminal (Termite/Tera Term/Hyperterminal), baud rate 115200. 
 +  * The EVAL-AD5110 reference project for Xilinx KC705 FPGA. 
  
 ===== Downloads ===== ===== Downloads =====
- +<WRAP round download 80%> 
-  * {{:resources:fpga:xilinx:interposer:ad5110_evalboard.zip|Reference Design Files}} +\\ 
- +  * {{:resources:fpga:xilinx:interposer:cf_ad5110_kc705.zip|Reference Design Files}} 
-The following table presents a short description the reference design archive contents. +  * **AD511x Driver:** https://github.com/analogdevicesinc/no-OS/tree/master/drivers/AD511x 
- +  * **AD5110 Commands:** https://github.com/analogdevicesinc/no-OS/tree/master/commands/AD511x  
-^ **Folder** ^ **Description** ^ +  * **Xilinx Boards Common Drivers:** https://github.com/analogdevicesinc/no-OS/tree/master/Xilinx/Common 
-| Bit | Contains the KC705 configuration file that can be used to program the system for quick evaluation. | +\\ 
-| Microblaze | Contains the EDK 13.4 project for the Microblaze softcore that will be implemented in the KC705 FPGA. | +</WRAP>
-| Software | Contains the source files of the software project that will be run by the Microblaze processor.| +
-| uCProbeInterface | Contains the uCProbe interface and the .elf symbols file used by uC-Probe to access data from the Microbalze memory. | +
 ====== Run the Demonstration Project ====== ====== Run the Demonstration Project ======
  
-{{page>ucprobe_common}} +===== Hardware setup =====
- +
-===== Demonstration Project User Interface ===== +
- +
-The following figure presents the **uC-Probe** interface that can be used for monitoring and controlling the operation of the **EVAL-AD5110SDZ** evaluation board. +
- +
-{{ :resources:fpga:xilinx:interposer:ad5110interface.jpg?700 }}+
  
-**Section A** is used to activate the board and monitor activity. The communication with the board is activated / deactivated by toggling the **//ON/OFF//** switch. The **//Activity//** LED turns green when the communication is active. If the **//ON/OFF//** switch is set to **//ON//** and the **//Activity//** LED is **//BLACK//** it means that there is a communication problem with the board. See the **Troubleshooting** section for indications on how to fix the communication problems.+<WRAP round important 80%> 
 +\\ 
 +Before connecting the ADI evaluation board to the Xilinx KC705 make sure that the VADJ_FPGA voltage of the KC705 is set to 3.3V. For more details on how to change the setting for VADJ_FPGA visit the Xilinx KC705 product page. 
 +</WRAP>
  
-**Section B** allows the user to write data to the internal RDAC Register. The value can be set using the slider provided, and the write operation will take place after clicking the Write RDAC button.+  * Use the FMC-SDP interposer to connect the ADI evaluation board to the Xilinx KC705 board on the FMC LPC connector. 
 +  * Connect the JTAG and UART cables to the KC705 and power up the FPGA board.
  
-**Section C** allows the user to read the value programmed in the RDAC Register by pressing the Read RDAC button.+===== Quick start evaluation ===== 
 +For a quick start evaluation, run the **download.bat** script located in the **SDK/SDK_Workspace/bin** folder provided within the Reference Design Files.  This script uses XMD to program the FPGA with the HDL Reference Design and download the Software Reference Design into the DDR.
  
-**Section D** is used to read the value of RDAC programmed in the internal EEPROM.+<WRAP round info 80%> 
 +\\ 
 +The **download.bat** script assumes that the Xilinx ISE Design Suite 14.6 is installed at this path: **C:/Xilinx/14.6**. If the installation path on your computer is different, please modify the script accordingly. 
 +</WRAP>
  
-**Section E** displays the Resistor Tolerance by pressing the Read Tolerance button.+If programming was successful, you should be seeing the command messages appear on the terminal.
  
-**Section F** is used to shutdown the device by pressing the Shutdown button.+===== Reference Project Overview ===== 
 +The following commands were implemented in this version of EVAL-AD5110 reference project for Xilinx KC705 FPGA board. 
 +^ Command ^ Description ^ 
 +| **help?** | Displays all available commands. | 
 +| **reset!** | Makes a software reset of the device. | 
 +| **rdac=** | Writes to the RDAC register. Accepted values:\\ 0 .. 127 - the value written to RDAC. | 
 +| **rdac?** | Displays the last written value in RDAC register. | 
 +| **rdacToEeprom!** | Writes the content of RDAC register to EEPROM. | 
 +| **wiper?** | Displays the wiper resistance from EEPROM. | 
 +| **tolerance?** | Displays the resistance tolerance from EEPROM. | 
 +| **power=** | Turns on/off the device. Accepted values:\\ 0 - turns off the device.\\ 1 - turns on the device. | 
 +| **power?** | Displays the power status of the device. |
  
-**Section G** is used to perform a Software Reset (loads the RDAC Register with the value programmed in the EEPROM). 
  
-**Section H** allows the user to save the current value of the RDAC Register into the internal EEPROM.+Commands can be executed using a serial terminal connected to the UART peripheral of Xilinx KC705 FPGA.
  
-===== Troubleshooting =====+The following image shows a generic list of commands in a serial terminal connected to Xilinx KC705 FPGA's UART peripheral. 
 +{{ :resources:fpga:xilinx:interposer:Terminal_KC705.jpg? }}
  
-In case there is a communication problem with the board the follwing actions can be perfomed in order to try to fix the issues: +===== Software Project Setup ===== 
-  * Check that the evaluation board is powered as instructed in the board's user guide. +{{page>import_workspace}}
-  * In uC-Probe refresh the symbols file by right-clicking on the **//System Browser//** window and selecting **//Refresh Symbols//**. +
-  * If the communication problem persists even after performing the previous steps, restart the uC-Probe application and try to run the interface again.+
  
 ====== More information ====== ====== More information ======
 {{page>ez_common}} {{page>ez_common}}
resources/fpga/xilinx/interposer/ad5110.txt · Last modified: 09 Jan 2021 00:39 by Robin Getz

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