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resources:fpga:xilinx:interposer:ad2s1205 [28 Sep 2012 14:07] – Added common section for describing the evaluation setup and System Demonstration Platform Adrian Costinaresources:fpga:xilinx:interposer:ad2s1205 [07 Nov 2013 14:05] – [More information] Lucian Sin
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 ====== Overview ====== ====== Overview ======
  
-This document presents the steps to setup an environment for using the **[[adi>AD2S1205|EVAL-AD2S1205CBZ]]** evaluation board together with the Xilinx KC705 FPGA board, the Xilinx Embedded Development Kit (EDK) and the [[http://micrium.com/page/products/tools/probe|Micrium µC-Probe]] run-time monitoring tool. Below is presented a picture of the EVAL-AD2S1205CBZ Evaluation Board with the Xilinx KC705 board.+This document presents the steps to setup an environment for using the **[[adi>AD2S1205|EVAL-AD2S1205SDZ]]** evaluation board together with the Xilinx KC705 FPGA board and the Xilinx Embedded Development Kit (EDK). Below is presented a picture of the EVAL-AD2S1205CBZ Evaluation Board with the Xilinx KC705 board.
  
 {{ :resources:fpga:xilinx:interposer:ad2S1205.jpg?400 }} {{ :resources:fpga:xilinx:interposer:ad2S1205.jpg?400 }}
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 {{page>common_sdp}} {{page>common_sdp}}
  
-Below is presented a picture of **SDP-B** Controller Board with the **EVAL-AD2S1205CBZ** Evaluation Board.+Below is presented a picture of **SDP-B** Controller Board with the **EVAL-AD2S1205SDZ** Evaluation Board.
  
 {{ :resources:fpga:xilinx:interposer:ad2s1205_sdp1z.jpg?400 }} {{ :resources:fpga:xilinx:interposer:ad2s1205_sdp1z.jpg?400 }}
  
-The **EVAL-AD2S1205CBZ** evaluation board is a member of a growing number of boards available for the **SDP**.  It was designed to help customers evaluate performance or quickly prototype new **AD2S1205** circuits and reduce design time.+The **EVAL-AD2S1205SDZ** evaluation board is a member of a growing number of boards available for the **SDP**.  It was designed to help customers evaluate performance or quickly prototype new **AD2S1205** circuits and reduce design time.
  
 The AD2S1205 is a complete 12-bit resolution tracking resolver-to-digital converter that contains an on-board programmable sinusoidal oscillator providing sine wave excitation for resolvers. The converter accepts 3.15 V p-p ± 27% input signals on the Sin and Cos inputs. A Type II tracking loop is employed to track the inputs and convert the input Sin and Cos information into a digital representation of the input angle and velocity. The maximum tracking rate is a function of the external clock frequency. The performance of the AD2S105 is specified across a frequency range of 8.192 MHz ± 25%, allowing a maximum tracking rate of 1250 rps. The AD2S1205 is a complete 12-bit resolution tracking resolver-to-digital converter that contains an on-board programmable sinusoidal oscillator providing sine wave excitation for resolvers. The converter accepts 3.15 V p-p ± 27% input signals on the Sin and Cos inputs. A Type II tracking loop is employed to track the inputs and convert the input Sin and Cos information into a digital representation of the input angle and velocity. The maximum tracking rate is a function of the external clock frequency. The performance of the AD2S105 is specified across a frequency range of 8.192 MHz ± 25%, allowing a maximum tracking rate of 1250 rps.
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 ===== More information ===== ===== More information =====
   * [[adi>AD2S1205|AD2S1205 Product Info]] - pricing, samples, datasheet   * [[adi>AD2S1205|AD2S1205 Product Info]] - pricing, samples, datasheet
-  * [[adi>/static/imported-files/eval_boards/302570705EVAL_AD2S1200_1205CBZ.pdf|EVAL-AD2S1205CBZ evaluation board user guide]]+  * [[adi>/static/imported-files/user_guides/UG-365.pdf|EVAL-AD2S1205SDZ evaluation board user guide]]
   * [[http://www.xilinx.com/products/boards-and-kits/EK-K7-KC705-G.htm | Xilinx KC705 FPGA board]]   * [[http://www.xilinx.com/products/boards-and-kits/EK-K7-KC705-G.htm | Xilinx KC705 FPGA board]]
-  * [[http://micrium.com/page/products/tools/probe|Micrium uC-Probe]] 
  
 ====== Getting Started ====== ====== Getting Started ======
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   * [[http://www.xilinx.com/products/boards-and-kits/EK-K7-KC705-G.htm | Xilinx KC705 FPGA board]]   * [[http://www.xilinx.com/products/boards-and-kits/EK-K7-KC705-G.htm | Xilinx KC705 FPGA board]]
   * FMC-SDP adapter board   * FMC-SDP adapter board
-  * **EVAL-AD2S1205CBZ** evaluation board+  * **EVAL-AD2S1205SDZ** evaluation board
  
 ===== Required Software ===== ===== Required Software =====
  
-  * Xilinx ISE 13.4 (Programmer (IMPACT) is sufficient for the demo and is available on Webpack). +  * Xilinx ISE 14.6. 
-  * [[http://micrium.com/page/products/tools/probe|uC-Probe]] run-time monitoring tool+  * UART Terminal (Termite/Tera Term/Hyperterminal), baud rate 115200. 
 +  * The EVAL-AD2S1205 reference project for Xilinx KC705 FPGA. 
  
 ===== Downloads ===== ===== Downloads =====
- +<WRAP round download 80%> 
-  * {{:resources:fpga:xilinx:interposer:ad2s1205_evalboard.zip|Reference Design Files}} +\\ 
- +  * **AD2S1205 Driver:** https://github.com/analogdevicesinc/no-OS/tree/master/device_drivers/AD2S1205 
-The following table presents a short description the reference design archive contents. +  * **AD2S1205 Commands:** https://github.com/analogdevicesinc/no-OS/tree/master/device_commands/AD2S1205 
- +  * **Xilinx Boards Common Drivers:** https://github.com/analogdevicesinc/no-OS/tree/master/platform_drivers/Xilinx/SDP_Common 
-^ **Folder** ^ **Description** ^ +  * **EDK KC705 Reference project:** https://github.com/analogdevicesinc/fpgahdl_xilinx/tree/master/cf_sdp_kc705 
-| Bit | Contains the KC705 configuration file that can be used to program the system for quick evaluation. | +\\ 
-| Microblaze | Contains the EDK 13.4 project for the Microblaze softcore that will be implemented in the KC705 FPGA. | +</WRAP>
-| Software | Contains the source files of the software project that will be run by the Microblaze processor.| +
-| uCProbeInterface | Contains the uCProbe interface and the .elf symbols file used by uC-Probe to access data from the Microbalze memory. | +
 ====== Run the Demonstration Project ====== ====== Run the Demonstration Project ======
  
-{{page>ucprobe_common}} +===== Hardware setup =====
- +
-===== Demonstration Project User Interface =====+
  
-The following figure presents the **uC-Probe** interface that can be used for monitoring and controlling the operation of the **EVAL-AD2S1205CBZ** evaluation board.+<WRAP round important 80%> 
 +\\ 
 +Before connecting the ADI evaluation board to the Xilinx KC705 make sure that the VADJ_FPGA voltage of the KC705 is set to 3.3V. For more details on how to change the setting for VADJ_FPGA visit the Xilinx KC705 product page. 
 +</WRAP>
  
-{{ :resources:fpga:xilinx:interposer:ad2s1205_interface.png?700 }}+  * Use the FMC-SDP interposer to connect the ADI evaluation board to the Xilinx KC705 board on the FMC LPC connector. 
 +  * Connect the JTAG and UART cables to the KC705 and power up the FPGA board.
  
-**Section A** is used to activate the board and monitor activity. The communication with the board is activated / deactivated by toggling the **//ON/OFF//** switch. The **//Activity//** LED turns green when the communication is active. If the **//ON/OFF//** switch is set to **//ON//** and the **//Activity//** LED is **//BLACK//** it means that there is a communication problem with the board. See the **Troubleshooting** section for indications on how to fix the communication problems.+===== Reference Project Overview ===== 
 +The following commands were implemented in this version of EVAL-AD2S1205 reference project for Xilinx KC705 FPGA board. 
 +^ Command ^ Description ^ 
 +| **help?** | Displays all available commands. | 
 +| **position?** | Displays the current angular position. | 
 +| **velocity?** | Displays the current angular velocity. |
  
-**Section B** displays the instantaneous position value read from the AD2S1205 and the minimum, maximum and mean postion values. +Commands can be executed using a serial terminal connected to the UART peripheral of Xilinx KC705 FPGA.
  
-**Section C** displays the instantaneous velocity value read from the AD2S1205 and the minimum, maximum and mean velocity values. +The following image shows a generic list of commands in a serial terminal connected to Xilinx KC705 FPGA's UART peripheral. 
 +{{ :resources:fpga:xilinx:interposer:Terminal_KC705.jpg? }}
  
-===== Troubleshooting =====+===== Software Project Setup ===== 
 +{{page>import_workspace}}
  
-In case there is a communication problem with the board the follwing actions can be perfomed in order to try to fix the issues: 
-  * Check that the evaluation board is powered as instructed in the board's user guide. 
-  * In uC-Probe refresh the symbols file by right-clicking on the **//System Browser//** window and selecting **//Refresh Symbols//**. 
-  * If the communication problem persists even after performing the previous steps, restart the uC-Probe application and try to run the interface again. 
  
 ====== More information ====== ====== More information ======
   * [[resources:tools-software:linux-drivers:iio-resolver:ad2s1200|AD2S1205 IIO Resolver-to-Digital Converter Linux Driver]]   * [[resources:tools-software:linux-drivers:iio-resolver:ad2s1200|AD2S1205 IIO Resolver-to-Digital Converter Linux Driver]]
 {{page>ez_common}} {{page>ez_common}}
resources/fpga/xilinx/interposer/ad2s1205.txt · Last modified: 09 Jan 2021 00:39 by Robin Getz

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