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resources:fpga:xilinx:fmc:ad9467 [17 Jul 2015 09:39] – [Downloads] Lucian Sinresources:fpga:xilinx:fmc:ad9467 [20 Apr 2020 13:32] – updated 9467fmc01c.zip file to remove specific email address Umesh Jayamohan
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 ===== Supported Carriers ===== ===== Supported Carriers =====
  
-  * [[xilinx>KC705]]+  * [[xilinx>KC705]] LPC Slot
   * [[http://www.zedboard.org| ZedBoard]]   * [[http://www.zedboard.org| ZedBoard]]
  
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 ==== Required Software ==== ==== Required Software ====
  
-  * We're upgrade the Xilinx tools on every release. The supported version number can be found in our [[https://github.com/analogdevicesinc/hdl/tree/master | git repository ]].  +  * We're upgrade the Xilinx tools on every release. The supported version number can be found in our HDL [[https://wiki.analog.com/resources/fpga/docs/releases | release page]].  
   * A UART terminal (Tera Term/Hyperterminal), baud rate 115200.   * A UART terminal (Tera Term/Hyperterminal), baud rate 115200.
  
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 <WRAP round info 100%> <WRAP round info 100%>
-Instruction about how to build the HDL design and generate a bit stream, can be found [[http://wiki.analog.com/resources/fpga/docs/hdl#building_hdl|here]]. +Instruction about how to build the HDL design and generate a bit stream can be found [[https://wiki.analog.com/resources/fpga/docs/build | here]]. 
 </WRAP> </WRAP>
  
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 The reference design is built on a ARM/Microblaze based system tailored for Linux. A functional block diagram of the design is given below. The reference design is built on a ARM/Microblaze based system tailored for Linux. A functional block diagram of the design is given below.
  
-{{:resources:fpga:xilinx:fmc:cf_ad9467_bd.jpg?400|block diagram}}+=== Xilinx block diagram === 
 +{{:resources:fpga:xilinx:fmc:ad9467_ebz:ad9467_fmc.svg?500|Xilinx HDL Block Diagram}} 
 + 
 +=== AD9467 FMC Card block diagram === 
 +{{:resources:fpga:xilinx:fmc:ad9467_ebz:ad9467_fmc_card.svg?400|Xilinx HDL Block Diagram}} 
  
 Through an SPI interface, the software can access the AD9467/AD9517-4 registers, given the possibility to initialize and configure the ADC and/or clock chip.   Through an SPI interface, the software can access the AD9467/AD9517-4 registers, given the possibility to initialize and configure the ADC and/or clock chip.  
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 The software project contains 3 components: the AD9467-FMC-EBZ reference design files, the AD9467 driver and the AD9517 driver. All the components have to be downloaded from the links provided in the [[http://wiki.analog.com/resources/fpga/xilinx/fmc/ad9467#downloads|Downloads]] section. The software project contains 3 components: the AD9467-FMC-EBZ reference design files, the AD9467 driver and the AD9517 driver. All the components have to be downloaded from the links provided in the [[http://wiki.analog.com/resources/fpga/xilinx/fmc/ad9467#downloads|Downloads]] section.
 +
 ==== AD9467 Software Driver ==== ==== AD9467 Software Driver ====
  
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 <WRAP round download> <WRAP round download>
 **latest release** **latest release**
-  * **ZED HDL Reference Design: ** https://github.com/analogdevicesinc/hdl/tree/master/projects/ad9467_fmc/zed +  * **ZED HDL Reference Design: ** https://github.com/analogdevicesinc/hdl/tree/hdl_2018_r1/projects/ad9467_fmc/zed 
-  * **KC705 HDL Reference Design: ** https://github.com/analogdevicesinc/hdl/tree/master/projects/ad9467_fmc/kc705+  * **KC705 HDL Reference Design: ** https://github.com/analogdevicesinc/hdl/tree/hdl_2018_r1/projects/ad9467_fmc/kc705
 </WRAP> </WRAP>
  
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 <WRAP round download> <WRAP round download>
 **latest release** **latest release**
-  * **AD9467 Driver:                   ** https://github.com/analogdevicesinc/no-OS/tree/master/drivers/AD9467 +  * **AD9467 Driver:                   ** https://github.com/analogdevicesinc/no-OS/tree/2018_R1/drivers/ad9467 
-  * **AD9517 Driver:                   ** https://github.com/analogdevicesinc/no-OS/tree/master/drivers/AD9517 +  * **AD9517 Driver:                   ** https://github.com/analogdevicesinc/no-OS/tree/2018_R1/drivers/ad9517 
-  * **AD9467-FMC-EBZ Reference Design: ** https://github.com/analogdevicesinc/no-OS/tree/master/AD9467-FMC-EBZ +  * **AD9467-FMC-EBZ Reference Design: ** https://github.com/analogdevicesinc/no-OS/tree/2018_R1/ad9467-fmc-ebz 
 </WRAP> </WRAP>
  
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   * {{:resources:fpga:xilinx:fmc:9467fmc01c_sch.pdf|Rev C Schematics for the card}}   * {{:resources:fpga:xilinx:fmc:9467fmc01c_sch.pdf|Rev C Schematics for the card}}
   * {{:resources:fpga:xilinx:fmc:9467fmc01c_bom.xls|Bill of Materials for Rev C}}   * {{:resources:fpga:xilinx:fmc:9467fmc01c_bom.xls|Bill of Materials for Rev C}}
-  * {{:resources:fpga:xilinx:fmc:9467fmc01c.zip|AD9467FMC-250EBZ Gerber/Layout Fabrication Files}}+  * {{ :resources:fpga:xilinx:fmc:9467fmc01c.zip|AD9467FMC-250EBZ Gerber/Layout Fabrication Files}}
 **Note:** C302 and C303 are not installed as indicated in the Schematic and BOM. **Note:** C302 and C303 are not installed as indicated in the Schematic and BOM.
 </WRAP> </WRAP>
 ===== More information ===== ===== More information =====
 +
 <WRAP round help 80%> <WRAP round help 80%>
 \\ \\
 [[ez>community/fpga|Ask questions about the FPGA reference design]] [[ez>community/fpga|Ask questions about the FPGA reference design]]
 </WRAP> </WRAP>
resources/fpga/xilinx/fmc/ad9467.txt · Last modified: 19 Apr 2024 11:59 by iulia Moldovan

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