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resources:fpga:xilinx:fmc:ad7961 [07 Aug 2013 14:32] – [Data Capture] Alexandru.Tofan | resources:fpga:xilinx:fmc:ad7961 [07 Aug 2013 15:44] – [Data Capture] Alexandru.Tofan | ||
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==== FPGA Configuration ==== | ==== FPGA Configuration ==== | ||
- | Start IMPACT, and initialze the JTAG chain. The program should recognize the FPGA device. Program the device. | + | Start IMPACT, and initialze the JTAG chain. The program should recognize the FPGA device. Program the device |
{{: | {{: | ||
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==== Data Capture ==== | ==== Data Capture ==== | ||
- | After successfully programming | + | At this point everything is set up and it is possible to start the evaluation of the ADI hardware. To capture data from the ADC run the **data_capture.bat** script located in the **" |
- | {{: | + | Data Capture Script\\ |
+ | {{: | ||
- | After data has been read from the device, | + | Acquisition.csv\\ |
+ | {{: | ||
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+ | UART Messages\\ | ||
+ | {{: | ||
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+ | <WRAP round tip 80%>The first time the data capture script is run it is possible that an error will occur while the script is trying to connect to the system. Just run the script again and the error shouldn' | ||
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===== Using the reference design ===== | ===== Using the reference design ===== | ||
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The reference design is built on a Microblaze based system. It consists of two functional modules, a LVDS interface, and a DMA interface. The LVDS interface captures and buffers data from the ADC. The data is captured using Echoed-Clock mode or Self-Clock mode (depending on the project). The DMA interface then transfers the samples to the external DDR-DRAM. The capture is initiated by the software, and transfered to the PC using a *.tcl script. | The reference design is built on a Microblaze based system. It consists of two functional modules, a LVDS interface, and a DMA interface. The LVDS interface captures and buffers data from the ADC. The data is captured using Echoed-Clock mode or Self-Clock mode (depending on the project). The DMA interface then transfers the samples to the external DDR-DRAM. The capture is initiated by the software, and transfered to the PC using a *.tcl script. | ||
- | ==== Registers ==== | ||
- | |||
- | The IP Core contains only a control register, that sets/clears the EN pins of the device. | ||
===== Downloads ===== | ===== Downloads ===== |