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| resources:fpga:xilinx:fmc:ad-fmcadc2-ebz [17 Jul 2015 10:04] – added downloads links and changed other links from the page Lucian Sin | resources:fpga:xilinx:fmc:ad-fmcadc2-ebz [09 Jul 2019 13:18] – Fixed No-OS links. No JESD204B license required. Removed ILA related information Adrian Costina |
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| ===== Introduction ===== | ===== Introduction ===== |
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| <WRAP important round>This design uses the [[http://www.xilinx.com/products/intellectual-property/EF-DI-JESD204.htm|Xilinx JESD204B core]] which requires either a commercial (pay $) or [[http://www.xilinx.com/ipcenter/ipevaluation/jesd204_evaluation.htm|evaluation]] license (eventually pay $) to use. If this is not what you are looking for, you should not use this board.</WRAP> | |
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| The [[/resources/eval/user-guides/ad-fmcadc2-ebz|AD-FMCADC2-EBZ]] is a high speed data acquisition (1 ADC channel at 2500 MSPS), in an FMC form factor, which has one high speed JESD204B Analog to Digital converters ([[adi>AD9625]]) on it. The AD9625 is a 12-bit monolithic sampling analog-to-digital converter (ADC) that operates at conversion rates of up to 2.5 giga samples per second (GSPS). This product is designed for sampling wide bandwidth analog signals up to the second Nyquist zone. The combination of wide input bandwidth, high sampling rate, and excellent linearity of the AD9625 is ideally suited for spectrum analyzers, data acquisition systems, and a wide assortment of military electronics applications, such as radar and jamming/antijamming measures. | The [[/resources/eval/user-guides/ad-fmcadc2-ebz|AD-FMCADC2-EBZ]] is a high speed data acquisition (1 ADC channel at 2500 MSPS), in an FMC form factor, which has one high speed JESD204B Analog to Digital converters ([[adi>AD9625]]) on it. The AD9625 is a 12-bit monolithic sampling analog-to-digital converter (ADC) that operates at conversion rates of up to 2.5 giga samples per second (GSPS). This product is designed for sampling wide bandwidth analog signals up to the second Nyquist zone. The combination of wide input bandwidth, high sampling rate, and excellent linearity of the AD9625 is ideally suited for spectrum analyzers, data acquisition systems, and a wide assortment of military electronics applications, such as radar and jamming/antijamming measures. |
| * ZC706 HDL Reference design: [[https://github.com/analogdevicesinc/hdl/tree/master/projects/fmcadc2/zc706]] | * ZC706 HDL Reference design: [[https://github.com/analogdevicesinc/hdl/tree/master/projects/fmcadc2/zc706]] |
| * VC707 HDL Reference design: [[https://github.com/analogdevicesinc/hdl/tree/master/projects/fmcadc2/vc707]] | * VC707 HDL Reference design: [[https://github.com/analogdevicesinc/hdl/tree/master/projects/fmcadc2/vc707]] |
| * VC707 Dual AD9625 Board HDL Reference design: [[https://github.com/analogdevicesinc/hdl/tree/master/projects/fmcadc5/vc707]] | |
| </WRAP> | </WRAP> |
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| ===== No-OS Software Source ===== | ===== No-OS Software Source ===== |
| <WRAP center round download> | <WRAP center round download> |
| * AD9625 Driver: [[https://github.com/analogdevicesinc/no-OS/tree/master/drivers/ad9625]] | * AD-FMCADC2-EBZ Project - https://github.com/analogdevicesinc/no-OS/tree/master/fmcadc2 |
| * AD-FMCADC2-EBZ Reference Design: [[https://github.com/analogdevicesinc/no-OS/tree/master/ad-fmcadc2-ebz]] | |
| </WRAP> | </WRAP> |
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| ===== Quick Start Guide ===== | |
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| The no-OS software contains a quick demonstration of the programming, RF conversion and data capture. | |
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| ===== ILA core ===== | |
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| Many internal signals of the design can be monitored using Vivado Logic Analyzer. | |
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| {{:resources:fpga:xilinx:fmc:ad9625_fmc_hw_ila.png?800|}} | |
