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| resources:fpga:altera:bemicro:cn0187 [16 Nov 2012 17:59] – [Evaluation Boards] Lars-Peter Clausen | resources:fpga:altera:bemicro:cn0187 [29 Dec 2020 20:26] – fix links Robin Getz | ||
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| ====== Overview ====== | ====== Overview ====== | ||
| - | This lab presents the steps to setup an environment for using the **[[adi> | + | This lab presents the steps to setup an environment for using the **[[adi> |
| {{ : | {{ : | ||
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| - | The [[adi>AD72661]] is a dual, 12-bit, high speed, low power, successive approximation ADC that operates from a single 2.7 V to 5.25 V power supply and features throughput rates up to 2 MSPS. The device contains two ADCs, each preceded by a 3-channel multiplexer, | + | The [[adi>AD7266]] is a dual, 12-bit, high speed, low power, successive approximation ADC that operates from a single 2.7 V to 5.25 V power supply and features throughput rates up to 2 MSPS. The device contains two ADCs, each preceded by a 3-channel multiplexer, |
| The conversion process and data acquisition use standard control inputs allowing easy interfacing to microprocessors or DSPs. The input signal is sampled on the falling edge of CS; conversion is also initiated at this point. The conversion time is determined by the SCLK frequency. There are no pipelined delays associated with the part. | The conversion process and data acquisition use standard control inputs allowing easy interfacing to microprocessors or DSPs. The input signal is sampled on the falling edge of CS; conversion is also initiated at this point. The conversion time is determined by the SCLK frequency. There are no pipelined delays associated with the part. | ||
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| * [[http:// | * [[http:// | ||
| * [[http:// | * [[http:// | ||
| - | * [[http:// | + | * [[http:// |
| ====== Getting Started ====== | ====== Getting Started ====== | ||
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| * [[http:// | * [[http:// | ||
| * [[https:// | * [[https:// | ||
| - | * [[http:// | + | * [[http:// |
| The **Quartus II** design software and the **Nios II EDS** is available via the Altera Complete Design Suite DVD or by downloading from the web. | The **Quartus II** design software and the **Nios II EDS** is available via the Altera Complete Design Suite DVD or by downloading from the web. | ||
| - | The **Micrium uC/Probe Trial** version is available via download from the web at [[http:// | + | The **Micrium uC/Probe Trial** version |
| ===== Downloads ===== | ===== Downloads ===== | ||
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| {{page> | {{page> | ||
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resources/fpga/altera/bemicro/cn0187.txt · Last modified: 26 Jan 2021 01:22 by Robin Getz