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resources:fpga:altera:all_hdl [27 Jan 2012 16:36] – Approved Robin Getzresources:fpga:altera:all_hdl [30 Jan 2012 15:20] – Replaced "RF/IF" with "Direct Digital Synthesis ( DDS) & Modulators " Dragos Bogdan
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   * [[./bemicro/AD7983|AD7983]] 16-Bit, 1.33 MSPS PulSAR ADC in MSOP/QFN   * [[./bemicro/AD7983|AD7983]] 16-Bit, 1.33 MSPS PulSAR ADC in MSOP/QFN
   * [[./bemicro/AD7984|AD7984]] 18-Bit, 1.33 MSPS PulSAR 10.5 mW ADC in MSOP/QFN    * [[./bemicro/AD7984|AD7984]] 18-Bit, 1.33 MSPS PulSAR 10.5 mW ADC in MSOP/QFN 
-  * [[./bemicro/CN0188|CN0188]] Low Cost, Level Shifted Low Side Current Monitor for Negative High Voltage Rails 
-  * [[./bemicro/CN0194|CN0194]] Galvanically Isolated, 2-Channel, 16-Bit, Simultaneous Sampling, Daisy-Chained Data Acquisition System 
-  * [[./bemicro/CN0216|CN0216]] Precision Weigh Scale Design Using the AD7791 24-Bit Sigma-Delta ADC with External ADA4528-1 Zero-Drift Amplifiers 
-  * [[./bemicro/CN0218|CN0218]] 500 V Common-Mode Voltage Current Monitor 
  
 === Digital to Analog Converters === === Digital to Analog Converters ===
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   * [[./bemicro/AD5781|AD5781]] True 18-Bit, Voltage Output DAC ±0.5 LSB INL, ±0.5 LSB DNL   * [[./bemicro/AD5781|AD5781]] True 18-Bit, Voltage Output DAC ±0.5 LSB INL, ±0.5 LSB DNL
   * [[./bemicro/AD5791|AD5791]] 1 ppm 20-Bit, ±1 LSB INL, Voltage Output DAC   * [[./bemicro/AD5791|AD5791]] 1 ppm 20-Bit, ±1 LSB INL, Voltage Output DAC
-  * [[./bemicro/CN0204|CN0204]] Flexible, High Voltage, High Accuracy, Low Drift PLC/DCS Analog Output Module  
  
 === Digital Potentiometers === === Digital Potentiometers ===
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   * [[./bemicro/AD8403|AD8403]] 4-Channel Digital Potentiometer   * [[./bemicro/AD8403|AD8403]] 4-Channel Digital Potentiometer
  
-=== RF/IF ===+=== Direct Digital Synthesis ( DDS) & Modulators ===
   * [[./bemicro/AD9833|AD9833]] Low Power, 12.65 mW, 2.3 V to +5.5 V, Programmable Waveform Generator   * [[./bemicro/AD9833|AD9833]] Low Power, 12.65 mW, 2.3 V to +5.5 V, Programmable Waveform Generator
   * [[./bemicro/AD9834|AD9834]] 20 mW Power, 2.3 V to 5.5 V, 75 MHz Complete DDS   * [[./bemicro/AD9834|AD9834]] 20 mW Power, 2.3 V to 5.5 V, 75 MHz Complete DDS
   * [[./bemicro/AD9837|AD9837]] Low Power, 8.5 mW, 2.3 V to 5.5 V, Programmable Waveform Generator   * [[./bemicro/AD9837|AD9837]] Low Power, 8.5 mW, 2.3 V to 5.5 V, Programmable Waveform Generator
   * [[./bemicro/AD9838|AD9838]] 11 mW Power, 2.3V to 5.5V, Complete DDS   * [[./bemicro/AD9838|AD9838]] 11 mW Power, 2.3V to 5.5V, Complete DDS
 +
 +=== Circuits from the Lab ===
   * [[./bemicro/CN0150|CN0150]] Software Calibrated, 1 MHz to 8 GHz, 70 dB RF Power Measurement System Using the AD8318 Logarithmic Detector   * [[./bemicro/CN0150|CN0150]] Software Calibrated, 1 MHz to 8 GHz, 70 dB RF Power Measurement System Using the AD8318 Logarithmic Detector
   * [[./bemicro/CN0178|CN0178]] Software-Calibrated, 50 MHz to 9 GHz, RF Power Measurement System   * [[./bemicro/CN0178|CN0178]] Software-Calibrated, 50 MHz to 9 GHz, RF Power Measurement System
   * [[./bemicro/CN0187|CN0187]] Crest Factor, Peak, and RMS RF Power Measurement Circuit Optimized for High Speed, Low Power, and Single 3.3 V Supply   * [[./bemicro/CN0187|CN0187]] Crest Factor, Peak, and RMS RF Power Measurement Circuit Optimized for High Speed, Low Power, and Single 3.3 V Supply
- +  * [[./bemicro/CN0188|CN0188]] Low Cost, Level Shifted Low Side Current Monitor for Negative High Voltage Rails 
 +  * [[./bemicro/CN0194|CN0194]] Galvanically Isolated, 2-Channel, 16-Bit, Simultaneous Sampling, Daisy-Chained Data Acquisition System 
 +  * [[./bemicro/CN0204|CN0204]] Flexible, High Voltage, High Accuracy, Low Drift PLC/DCS Analog Output Module  
 +  * [[./bemicro/CN0216|CN0216]] Precision Weigh Scale Design Using the AD7791 24-Bit Sigma-Delta ADC with External ADA4528-1 Zero-Drift Amplifiers 
 +  * [[./bemicro/CN0218|CN0218]] 500 V Common-Mode Voltage Current Monitor
 ==== CED1Z ==== ==== CED1Z ====
  
-=== Digital to Analog Converters ===+=== Analog to Digital Converters === 
 +  * [[./ced1z/AD7621|AD7621]] 16-Bit, 2 LSB INL, 3 MSPS PulSAR® ADC 
 +  * [[./ced1z/AD7626|AD7626]] 16-Bit, 10 MSPS, PulSAR Differential ADC
   * [[./ced1z/AD7671|AD7671]] 16-Bit 1 MSPS Bipolar PulSAR® ADC   * [[./ced1z/AD7671|AD7671]] 16-Bit 1 MSPS Bipolar PulSAR® ADC
-  * [[./ced1z/AD7621|AD7621]] 16-Bit, 2 LSB INL, 3 MSPS PulSAR® ADC 
   * [[./ced1z/AD7938|AD7938]] 8-Channel, 1.5 MSPS, 12-Bit Parallel ADC with a Sequencer     * [[./ced1z/AD7938|AD7938]] 8-Channel, 1.5 MSPS, 12-Bit Parallel ADC with a Sequencer  
  
resources/fpga/altera/all_hdl.txt · Last modified: 06 Mar 2015 11:42 by Lars-Peter Clausen