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resources:eval:user-guides:xud1a:user-guide [16 May 2022 17:05] – updated image, added support links Sam Ringwoodresources:eval:user-guides:xud1a:user-guide [19 May 2023 20:01] (current) – [Software/Digital Control] Sam Ringwood
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 {{ :resources:eval:user-guides:xud1a:eval-adxud1aebz_top-web.gif?400 |}} {{ :resources:eval:user-guides:xud1a:eval-adxud1aebz_top-web.gif?400 |}}
-<WRAP centeralign>**//Figure 1: ADXUD1AEBZ-EVAL1Z Board//**</WRAP>+<WRAP centeralign>**//Figure 1: ADXUD1AEBZ Board: Front//**</WRAP> 
 + 
 +{{ :resources:eval:user-guides:xud1a:eval-adxud1aebz_bottom.jpg?400 |}} 
 +<WRAP centeralign>**//Figure 2: ADXUD1AEBZ Board: Back//**</WRAP>
  
 ---- ----
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   * ADXUD1AEBZ Rev. D Design:   * ADXUD1AEBZ Rev. D Design:
     * {{ :resources:eval:user-guides:xud1a:02-065073-01-d.pdf | Schematic}}     * {{ :resources:eval:user-guides:xud1a:02-065073-01-d.pdf | Schematic}}
 +    * {{ :resources:eval:user-guides:xud1a:xud1a_bom.zip |Bill of Materials}}
   * Interposer Board Rev. A Design:   * Interposer Board Rev. A Design:
     * {{ :resources:eval:user-guides:xud1a:02-067148-01-a.pdf | Schematic}}     * {{ :resources:eval:user-guides:xud1a:02-067148-01-a.pdf | Schematic}}
 +    * {{ :resources:eval:user-guides:xud1a:interposerbom.zip |Bill of Materials}}
 +  * Interposer Board Rev. B Design:
 +    * {{ :resources:eval:user-guides:xud1a:02-067148-01-b.pdf | Schematic}}
 +    * {{ :resources:eval:user-guides:xud1a:interposerbom-b.zip |Bill of Materials}}
  
 ===== Hardware ===== ===== Hardware =====
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 ===== Software/Digital Control ===== ===== Software/Digital Control =====
-=== SDP Control === 
-  * [[http://swdownloads.analog.com/ACE/SDP/SDPDrivers.exe|SDP Drivers]] 
-  * {{ :resources:eval:user-guides:xud1a:sdp_xud1a.zip |Basic SDP Test Program}} (Windows 10 might try to block this, you'll have to explicitly allow it in your security settings) 
-  * [[adi>sdp-s|SDP-S controller board]] 
- 
 === PMOD Control === === PMOD Control ===
   * Two 14-pin PMOD cables ([[https://www.digikey.com/en/products/detail/assmann-wsw-components/H3AKH-1406G/998997|Example]])   * Two 14-pin PMOD cables ([[https://www.digikey.com/en/products/detail/assmann-wsw-components/H3AKH-1406G/998997|Example]])
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     * [[https://www.arduino.cc/|Arduino]]     * [[https://www.arduino.cc/|Arduino]]
     * [[https://www.ftdichip.com/|FTDI]]     * [[https://www.ftdichip.com/|FTDI]]
 +
 +=== SDP Control ===
 +  * [[http://swdownloads.analog.com/ACE/SDP/SDPDrivers.exe|SDP Drivers]]
 +  * {{ :resources:eval:user-guides:xud1a:sdp_xud1a.zip |Basic SDP-S Test Program Rev A}} 
 +  * {{ {{ :resources:eval:user-guides:xud1a:sdps_xud1a_r1.zip | Basic SDP-S Test Program Rev B}} 
 +<note>Windows 10 might try to block the example Test Program, you'll have to explicitly allow it in your security settings</note>
 +  * [[adi>sdp-s|SDP-S controller board]]
  
 === Software === === Software ===
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 {{ :resources:eval:user-guides:xud1a:xud1a_revd_blockdiagram.png |}} {{ :resources:eval:user-guides:xud1a:xud1a_revd_blockdiagram.png |}}
-<WRAP centeralign>**//Figure 2: ADXUD1AEBZ Block Diagram//**</WRAP>+<WRAP centeralign>**//Figure 3: ADXUD1AEBZ Block Diagram//**</WRAP>
  
 ===== LO Signal Chain ===== ===== LO Signal Chain =====
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 By default, the board populates C165 for an external LO source with C61 not installed. The user can remove C165 and re-install on the C61 pad to enabled use of the ADF4371. When using the onboard ADF4371, the default reference is the onboard VCXO with C372 installed and C373 not installed. The user can remove C372 and re-install on the C373 pad to enabled use of the external reference port J3. By default, the board populates C165 for an external LO source with C61 not installed. The user can remove C165 and re-install on the C61 pad to enabled use of the ADF4371. When using the onboard ADF4371, the default reference is the onboard VCXO with C372 installed and C373 not installed. The user can remove C372 and re-install on the C373 pad to enabled use of the external reference port J3.
  
 +<note>An external LO source is recommended for performance based measurements. The on-board ADF4371 is provided for convenience to allow stand-alone operation of the hardware for a wide range of operational frequencies. A bandpass filter should be inserted in the ADF4371 PLL output path depending on the final frequency plan to reject the harmonic content generated by the ADF4371 internal multipliers.</note>
 ===== Digital Control ===== ===== Digital Control =====
 ==== PMOD Pinout ==== ==== PMOD Pinout ====
-The digital input signals are intended to be 1.8V logic while the [[adi>ADRF5020|ADRF5020]], [[adi>ADL8111|ADL8111]], and [adi>adf4371|ADF4371]] digital control inputs require logic levels of 3.3V. Level translators and digital logic circuitry have been included between the PMOD connector and aforementioned components.+The digital input signals are intended to be 1.8V logic while the [[adi>ADRF5020|ADRF5020]], [[adi>ADL8111|ADL8111]], and [[adi>ADF4371|ADF4371]] digital control inputs require logic levels of 3.3V. Level translators and digital logic circuitry have been included between the PMOD connector and aforementioned components.
  
 {{ :resources:eval:user-guides:xud1a:xud1a_pmod.png?400 |}} {{ :resources:eval:user-guides:xud1a:xud1a_pmod.png?400 |}}
-<WRAP centeralign>**//Figure 3: ADXUD1AEBZ PMOD Pinout//**</WRAP>+<WRAP centeralign>**//Figure 4: ADXUD1AEBZ PMOD Pinout//**</WRAP>
  
 ==== Interposer Board ==== ==== Interposer Board ====
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 {{ :resources:eval:user-guides:xud1a:xud1a_sdps.png? |}} {{ :resources:eval:user-guides:xud1a:xud1a_sdps.png? |}}
-<WRAP centeralign>**//Figure 4: ADXUD1AEBZ Interposer Pinout with SDP-S Connector//**</WRAP>+<WRAP centeralign>**//Figure 5: ADXUD1AEBZ Interposer Pinout with SDP-S Connector//**</WRAP>
  
-{{ :resources:eval:user-guides:xud1a:xud1a_fmc_v2.png? |}} +==== Control Logic ==== 
-<WRAP centeralign>**//Figure 5: ADXUD1AEBZ Interposer Pinout with FMC Connector//**</WRAP>+The PMOD inputs are fed to a buffer and logic network for simplified board control and quick switching time.  
 + 
 +{{ :resources:eval:user-guides:xud1a:xud1a_controlblockdiagram.png?600 |}} 
 +<WRAP centeralign>**//Figure 6: ADXUD1AEBZ Control Block Diagram//**</WRAP> 
 + 
 + 
 +^ Channel ^  Mode  ^ TXRX0 ^ TXRX1 ^ TXRX2 ^ TXRX3 ^ Rx Gain Mode ^ 
 +|     A    |    TX    |    1    |    -    |    -    |    -    |    0    | 
 +|     :::    |    RX Low Gain    |    0    |    -    |    -    |    -    |    0    | 
 +|     :::    |    RX High Gain    |    0    |    -    |    -    |    -    |    1    | 
 +|     B    |    TX    |    -    |    1    |    -    |    -    |    0    | 
 +|     :::    |    RX Low Gain    |    -    |    0    |    -    |    -    |    0    | 
 +|     :::    |    RX High Gain    |    -    |    0    |    -    |    -    |    1    | 
 +|     C    |    TX    |    -    |    -    |    1    |    -    |    0    | 
 +|     :::    |    RX Low Gain    |    -    |    -    |    0    |    -    |    0    | 
 +|     :::    |    RX High Gain    |    -    |    -    |    0    |    -    |    1    | 
 +|     D    |    TX    |    -    |    -    |    -    |    1    |    0    | 
 +|     :::    |    RX Low Gain    |    -    |    -    |    -    |    0    |    0    | 
 +|     :::    |    RX High Gain    |    -    |    -    |    -    |    0    |    1    | 
 +<WRAP centeralign>**//Table 1: ADXUD1AEBZ RF Control Logic//**</WRAP> 
 + 
 +^  ADF4371 Output  ^  PLL_OUTPUT_SEL  ^ 
 +|     8 - 16 GHz    |    1   | 
 +|     16 - 32 GHz    |    0   | 
 +<WRAP centeralign>**//Table 2: ADXUD1AEBZ ADF4371 Control Logic//**</WRAP>
  
 ====== Evaluation ====== ====== Evaluation ======
 ===== Software Control ===== ===== Software Control =====
 There are two methods to control the XUD1A board using the interposer board. Either over the FMC connector using the ZCU102 FPGA or over the SDP connector using a SDP-S controller. Limited functionality is available using the SDP-s controller, but a user has the basic ability to program the state of XUD1A (TX, RX Low Gain, RX High Gain) using the SPD-S controller.  There are two methods to control the XUD1A board using the interposer board. Either over the FMC connector using the ZCU102 FPGA or over the SDP connector using a SDP-S controller. Limited functionality is available using the SDP-s controller, but a user has the basic ability to program the state of XUD1A (TX, RX Low Gain, RX High Gain) using the SPD-S controller. 
- 
-<note>If using the SDP-S controller to control XUD1A, then install the EEPROM Programmer software and connect the SDP-S controller board. Load the XUD1A.dat file into the File Path of the EEPROM Programmer software. Write the EEPROM. Disconnect from the EEPROM Programmer to use with XUD1A.</note> 
  
 ===== Standalone Python Application ===== ===== Standalone Python Application =====
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 [[resources/eval/user-guides/xud1a|ADXUD1AEBZ Homepage]] [[resources/eval/user-guides/xud1a|ADXUD1AEBZ Homepage]]
  
-[[resources/eval/developer-kits/x-band-dev-kit|X Band Development Platform]]+[[:resources:eval:user-guides:x-band-platform|X Band Development Platform]] 
 + 
  
  
resources/eval/user-guides/xud1a/user-guide.1652713513.txt.gz · Last modified: 16 May 2022 17:05 by Sam Ringwood

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