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| — | resources:eval:user-guides:quadmxfe [30 Apr 2021 18:01] – [Publications] Chas Frick |
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| | ====== Quad-MxFE Prototyping Platform User Guide====== |
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| | ===== Product Details ===== |
| | The [[adi>/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/Quad-MxFE.html|Quad-MxFE System Development Platform]] contains four [[adi>/en/products/digital-to-analog-converters/high-speed-da-converters/mixed-signal-frontends.html|MxFE™]] software defined, direct RF sampling transceivers, as well as associated RF front-ends, clocking, and power circuitry. The target application is phased array radars, electronic warfare, and ground-based SATCOM, specifically a **16 transmit/16 receive channel** direct sampling phased array at L/S/C band (0.1 GHz to ~5GHz). The Rx & Tx RF front-end has drop-in configurations that allow for customized frequency ranges, depending on the user’s application. |
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| | The Quad-MxFE System Development Platform highlights a complete system solution. It is intended as a testbed for demonstrating multi-chip synchronization as well as the implementation of system level calibrations, beamforming algorithms, and other signal processing algorithms. The system is designed to mate with a [[xilinx>VCU118]] Evaluation Board from Xilinx®, which features the Virtex® UltraScale+™ XCVU9P FPGA, with provided reference software, HDL code, and MATLAB system-level interfacing. |
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| | In addition to the Quad-MxFE Digitizing Card, the kit also contains a [[resources:eval:user-guides:quadmxfe:calboard|16Tx/16Rx Calibration Board]] that is used to develop system-level calibration algorithms, or otherwise more easily demonstrate power-up phase determinism in situations pertinent to their own use case. The Calibration Board also allows the user to demonstrate combined-channel dynamic range, spurious, and phase noise improvements and can also be controlled via a free MATLAB add-on when connected to the PMOD interface of the [[xilinx>VCU118]]. |
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| | The system can be used to enable quick time-to-market development programs for applications like: |
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| | * ADEF (Phased-Array, RADAR, EW, SATCOM) |
| | * Communications Infrastructure (Multiband 5G and mmWave 5G) |
| | * Electronic Test and Measurement |
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| | {{ :resources:eval:user-guides:board_top_edited.jpg |} |
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| | {{ analogTV>6184061669001 }} |
| | ---- |
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| | ===== User Resources ===== |
| | * [[resources:eval:user-guides:quadmxfe#product_details|High-Level Overview]] |
| | - [[resources:eval:user-guides:quadmxfe#features|System Features]] |
| | - [[resources:eval:user-guides:quadmxfe#general_description|General Description]] |
| | * [[resources:eval:user-guides:quadmxfe:quickbringup|Getting Started]] - **Install Fan/Heat Sinks Prior To First Use!** |
| | - [[resources:eval:user-guides:quadmxfe:quickbringup#equipment_needed|Equipment Needed]] |
| | - [[resources:eval:user-guides:quadmxfe:quickbringup#software_needed|Required Software]] |
| | - [[resources:eval:user-guides:quadmxfe:quick-start#downloads|Download Supported Bitstreams & Use Cases]] |
| | - [[resources:eval:user-guides:quadmxfe:quick-start#iio_oscilloscope|IIO Oscilloscope]] |
| | - [[resources:eval:user-guides:quadmxfe:quickbringup#matlab_control_overview|MATLAB Control Overview]] |
| | - [[resources:eval:user-guides:quadmxfe:quickbringup#quadmxfe_simpleTxRx.m|Simple Tx & Rx Control]] |
| | - [[resources:eval:user-guides:quadmxfe:quickbringup#quadmxfe_systemalignmentfir.m|System Phase/Amplitude Alignment/Equalization Using Programmable Finite Impulse Response Filters]] |
| | - [[resources:eval:user-guides:quadmxfe:quickbringup#quadmxfe_mcs.m|Demonstrate Multi-Chip Synchronization]] |
| | - [[resources:eval:user-guides:quadmxfe:quickbringup#quadmxfe_adctodac_loopback.m|Low-Latency ADC-to-DAC Loopback Bypassing JESD204b/c Interface for Repeater or Translator Applications]] |
| | * [[resources:eval:user-guides:quadmxfe:boardhardwaredetails|Hardware Information]] |
| | - [[resources:eval:user-guides:quadmxfe:boardhardwaredetails#transmit_path|Transmit Path]] |
| | - [[resources:eval:user-guides:quadmxfe:boardhardwaredetails#receive_path|Receive Path]] |
| | - [[resources:eval:user-guides:quadmxfe:boardhardwaredetails#clocking_architecture|Clocking Architecture]] |
| | - [[resources:eval:user-guides:quadmxfe:boardhardwaredetails#digital_interface|Digital Interface]] |
| | - [[resources:eval:user-guides:quadmxfe:boardhardwaredetails#control_interfaces|Control Interfaces]] |
| | - [[resources:eval:user-guides:quadmxfe:boardhardwaredetails#power_supplies|Power Distribution]] |
| | - [[resources:eval:user-guides:quadmxfe:boardhardwaredetails#thermal_considerations|Thermal Considerations]] |
| | - [[resources:eval:user-guides:quadmxfe:boardhardwaredetails#schematic|Schematic]] |
| | * [[resources:eval:user-guides:ad_quadmxfe1_ebz:ad_quadmxfe1_ebz_hdl|HDL]] |
| | - [[https://github.com/ronagyl/hdl/tree/dev_quad_mxfe_revab/projects/ad_quadmxfe1_ebz|Rev A/B. Quad-MxFE HDL Reference Design]] |
| | - [[https://github.com/ronagyl/hdl/tree/dev_quad_mxfe_revc/projects/ad_quadmxfe1_ebz|Rev C. Quad-MxFE HDL Reference Design]] |
| | * [[resources:eval:user-guides:quadmxfe:multichipsynchronization|Multi-Chip Synchronization Guide]] |
| | * [[resources:eval:user-guides:quadmxfe#related_documents|Related Documents]] |
| | - [[resources:eval:user-guides:quadmxfe#publications|Publications]] |
| | - [[resources:eval:user-guides:quadmxfe#related_part_pages|IC Part Pages]] |
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| | ---- |
| | ===== Features ===== |
| | * Multi-channel, wideband system development platform for the [[adi>AD9081|AD9081]] [[adi>/en/products/digital-to-analog-converters/high-speed-da-converters/mixed-signal-frontends.html|MxFE™]] |
| | * Mates with Xilinx [[xilinx>VCU118]] Evaluation Board (Not Included) |
| | * 16x RF Receive (Rx) Channels (32x Digital Rx Channels) |
| | * Total 16x 1.5GSPS to 4GSPS ADC |
| | * 48x Digital Down Converters (DDCs), Each Including Complex Numerically-Controlled Oscillators (NCOs) |
| | * 16x Programmable Finite Impulse Response Filters (pFIRs) |
| | * 16x RF Transmit (Tx) Channels (32x Digital Tx Channels) |
| | * Total 16x 3GSPS to 12GSPS DAC |
| | * 48x Digital Up Converters (DUCs) , Each Including Complex Numerically-Controlled Oscillators (NCOs) |
| | * Flexible Rx & Tx RF Front-Ends |
| | * Rx: Filtering, Amplification, Digital Step Attenuation for Gain Control |
| | * Tx: Filtering, Amplification |
| | * Multiple System Control and Analysis Tools |
| | * IIO Oscilloscope GUI |
| | * MATLAB Add-Ons & Example Scripts |
| | * HDL and Embedded Software Solutions for JESD204b/JESD204c Bring-Up |
| | * Provided Application-Specific Examples |
| | * Multi-Chip Synchronization for Power-Up Phase Determinism |
| | * System-Level Amplitude/Phase Alignment Using NCOs |
| | * Low-Latency ADC-to-DAC Loopback Bypassing JESD Interface |
| | * pFIR Control for Broadband Channel-to-Channel Amplitude/Phase Alignment |
| | * Fast-Frequency Hopping |
| | * On-Board Power Regulation from Single 12V Power Adapter (Included) |
| | * Flexible Clock Distribution |
| | * On-Board Clock Distribution from Single External 500MHz Reference |
| | * Support for External Converter Clock |
| | * On-board power regulation from 12V power adaptor (included) |
| | |
| | ---- |
| | ===== General Description ===== |
| | |
| | This user guide serves as the main source of information for system engineers and software developers using the Quad-MxFE System Evaluation Board, which contains four [[adi>AD9081]] software defined, direct RF sampling transceivers, as well as associated RF front-end, clocking, and power circuitry. The target application is phased array radars, electronic warfare, and ground-based SATCOM, specifically a 16 transmit/16 receive channel direct sampling phased array at L/S/C band (0.1 GHz to ~5GHz). The Rx & Tx RF front-end has drop-in configurations that allow for customized frequency ranges, depending on the user’s application. |
| | |
| | The Quad-MxFE System Evaluation Board highlights a complete system solution. It is intended as a testbed for demonstrating multi-chip synchronization as well as implementation of system level calibrations, beam forming algorithms, and other signal processing algorithms. The board is designed to mate with a [[xilinx>VCU118]] Evaluation Board from Xilinx®, which features the Virtex® UltraScale+™ XCVU9P FPGA, with provided reference software and HDL code. |
| | ==== High-Level Block Diagram ==== |
| | {{:resources:eval:user-guides:quadmxfe_highlevelblockdiagram.png?1000|}} |
| | |
| | ==== System Integration ==== |
| | Below is the full integrated system including the [[xilinx>VCU118]], ADQUADMXFE1EBZ, and [[resources:eval:user-guides:quadmxfe:calboard|ADQUADMXFE-CAL]] in full operation. |
| | {{ :resources:eval:user-guides:quadfull_edit.jpg |}} |
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| | ==== Key Component Locations ==== |
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| | {{ :resources:eval:user-guides:board_top_edited_labeled.jpg |}} |
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| | {{ :resources:eval:user-guides:board_bottom_edited_2.jpg |}} |
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| | ==== LED Status Indicators ==== |
| | |
| | {{ :resources:eval:user-guides:quadfullleds.jpg |}} |
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| | * [[/resources/eval/user-guides/quadmxfe/boardhardwaredetails#power_leds| Quad MxFE Power (Green) LED Information]] |
| | * [[/resources/eval/user-guides/quadmxfe/boardhardwaredetails#clock_leds| Quad MxFE Clock (Blue) LED Information]] |
| | * [[/resources/eval/user-guides/quadmxfe/calboard#led_identification | Calibration Broad LED Information]] |
| | * [[xilinx>support/documentation/boards_and_kits/vcu118/ug1224-vcu118-eval-bd.pdf | VCU118 LED Information (pg. 85)]] |
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| | ---- |
| | ===== Related Documents ===== |
| | |
| | |
| | ==== Publications ==== |
| | * [[adi>/en/design-notes/multichannel-rf-to-bits-development-platform.html|Multichannel RF to Bits Development Platform]] |
| | * [[adi>en/technical-articles/power-up-phase-determinism-using-multichip-synchronization.html|Power-Up Phase Determinism Using Multichip Synchronization Features in Integrated Wideband DACs and ADCs]] |
| | * [[https://event.on24.com/eventRegistration/console/EventConsoleApollo.jsp?simulive=y&eventid=3106011&sessionid=1&username=&partnerref=&format=fhaudio&mobile=&flashsupportedmobiledevice=&helpcenter=&key=2348CF8BD7B9D9BA7D9E9F11882A7EC2&newConsole=true&nxChe=true&newTabCon=true&consoleEarEventConsole=false&text_language_id=en&playerwidth=748&playerheight=526&eventuserid=427615421&contenttype=A&mediametricsessionid=375811890&mediametricid=4346503&usercd=427615421&mode=launch|Multi-Channel System Improvements Using Hardened DSP in Digitizer ICs]] |
| | |
| | ==== Related Part Pages ==== |
| | |
| | === MxFE === |
| | |
| | * [[adi>/en/products/ad9081.html|AD9081]] |
| | * [[adi>/en/products/ad9082.html|AD9082]] |
| | * [[:resources:eval:user-guides:ad9081_fmca_ebz:quickstart:zynqmp|AD9081/AD9082 Zynq UltraScale+ MPSoC ZCU102 Quick Start Guide]] |
| | * [[adi>/media/en/technical-documentation/user-guides/ad9081-ad9082-ug-1578.pdf|UG-1578 User Guide]] |
| | === ADF4371 === |
| | * [[adi>/en/products/adf4371.html|ADF4371]] |
| | * [[resources:tools-software:linux-drivers:iio-pll:adf4371|ADF4371 IIO Wideband Synthesizer Linux Driver]] |
| | === HMC7043 === |
| | * [[adi>/en/products/hmc7043.html|HMC7043]] |
| | * [[resources:tools-software:linux-drivers:iio-pll:hmc7044|HMC7044 Clock Jitter Attenuator with JESD204B Linux Driver]] |
| | |
| | === LTM4633 === |
| | * [[adi>/en/products/ltm4633.html|LTM4633]] |
| | |
| | === LTM8063 === |
| | * [[adi>/en/products/ltm8063.html|LTM8063]] |
| | |
| | === LTM8053 === |
| | * [[adi>/en/products/ltm8053.html|LTM8053]] |
| | |
| | === FPGA Evaluation Board Hardware === |
| | * [[xilinx>/products/boards-and-kits/vcu118.html|Xilinx Virtex UltraScale+ FPGA VCU118]] |
| | |
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| | ---- |
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| | ===== Questions ===== |
| | |
| | For additional questions or support, please visit the Engineering Zone forum at [[ez>adef]]. |
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| | ---- |
