Differences
This shows you the differences between two versions of the page.
| Both sides previous revisionPrevious revision | Next revisionBoth sides next revision | ||
| resources:eval:user-guides:pioneer1-wiredcbm [15 Feb 2021 16:30] – Richard Anslow | resources:eval:user-guides:pioneer1-wiredcbm [15 Feb 2021 16:35] – Richard Anslow | ||
|---|---|---|---|
| Line 150: | Line 150: | ||
| A simplified power over data wires simulation circuit is provided in Figure 10. This circuit uses LTC2862 RS-485 transceiver LTspice macromodels and 1 mH inductors (Wurth 74477830). LTspice includes real inductor models, which include device parasitics, enabling closer correlation between simulation and real design performance. The DC blocking capacitor values are 10 µF. In general, using larger inductor and capacitor values enable a lower data rate performance on the communication network. The simulated test case is a 250 kHz data rate, which roughly corresponds to 100 meters of cabled communication when porting clock synchronised SPI over an RS-485 interface. The input voltage waveform used in the simulation corresponds to a worst-case dc content, with a 16-bit word and all logic high bits. Simulation results are presented in Figures 11 and 12. The input voltage waveform (VIN) matches the output at the remote powered device (no communication errors). Figure 12 presents a zoomed-in view of the bus voltage differential waveform (voltage A – voltage B) for droop analysis. The voltage at the remote sensor node, extracted from the L2 inductor (V(pout)) provides a power supply rail of 5V±1mV. | A simplified power over data wires simulation circuit is provided in Figure 10. This circuit uses LTC2862 RS-485 transceiver LTspice macromodels and 1 mH inductors (Wurth 74477830). LTspice includes real inductor models, which include device parasitics, enabling closer correlation between simulation and real design performance. The DC blocking capacitor values are 10 µF. In general, using larger inductor and capacitor values enable a lower data rate performance on the communication network. The simulated test case is a 250 kHz data rate, which roughly corresponds to 100 meters of cabled communication when porting clock synchronised SPI over an RS-485 interface. The input voltage waveform used in the simulation corresponds to a worst-case dc content, with a 16-bit word and all logic high bits. Simulation results are presented in Figures 11 and 12. The input voltage waveform (VIN) matches the output at the remote powered device (no communication errors). Figure 12 presents a zoomed-in view of the bus voltage differential waveform (voltage A – voltage B) for droop analysis. The voltage at the remote sensor node, extracted from the L2 inductor (V(pout)) provides a power supply rail of 5V±1mV. | ||
| - | {{ : | + | {{ : |
| **Figure 10. Engineered Power LTspice simulation circuit using LTC2862 (RS-485) and 1mH Wurth Inductor 74477830** | **Figure 10. Engineered Power LTspice simulation circuit using LTC2862 (RS-485) and 1mH Wurth Inductor 74477830** | ||
resources/eval/user-guides/pioneer1-wiredcbm.txt · Last modified: 16 Feb 2021 10:34 by Richard Anslow