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--- resources:eval:user-guides:eval-adicup3029:reference_designs:demo_ad7124-8 [11 Aug 2020 14:32] – [AD7124-8 PMOD EVAL_ADICUP3029 Demo (w/ EVAL-AD7124-8-PMDZ)] Andrei Drimbarean
+++ resources:eval:user-guides:eval-adicup3029:reference_designs:demo_ad7124-8 [08 Mar 2021 02:27] (current) – [Obtaining the Source Code] adding in .Hex files Zuedmar Arceo
@@ Line 1: / Line 1: @@
-<note important>
-THIS IS A TEMPLATE.\\ \\
-THE GOAL IS TO CREATE A DOCUMENT CUSTOMERS WILL USE WHEN SETTING UP THEIR CFTL DEMO, SO THEY DON'T ASK YOU SO MANY QUESTIONS.  IT'S DESIGNED TO HELP YOU GET STARTED WRITING YOUR REFERENCE DEMO USER GUIDE.
-ALL OF THE CONTENT IS PLACEHOLDER INFORMATION, SO YOU WILL NEED TO POPULATE RELEVANT INFORMATION TO YOUR CFTL.  SOME(OR SEVERAL) OF THE SECTION HEADERS MAY NOT APPLY TO YOU, SIMPLY REMOVE THEM.  ALSO I MAY NOT HAVE CAPTURED EVERYTHING RELATIVE TO YOUR BOARD, SO ADDING INFORMATION IS ACCEPTABLE.
-DON'T FORGET TO CREATE A MEDIA FOLDER SPECIFIC TO YOUR DEMO FOR ANY IMAGES, FILES, OR DOCUMENTS YOU WISH TO INCLUDE.  THIS WILL HELP US KEEP THE WIKI ORGANIZED AND ENSURE YOUR CONTENT DOESN'T GET REMOVED.
-</note>
 ====== AD7124-8 PMOD EVAL_ADICUP3029 Demo (w/ EVAL-AD7124-8-PMDZ) ======
@@ Line 14: / Line 4: @@
 ===== General Description/Overview =====
-The **ADuCM_demo_cn0414** project uses **EVAL-CN0414-ARDZ** to provide a complete, fully isolated and highly flexible, four channel analog input system. The **EVAL-CN0414-ARDZ** is suitable for programmable logic controllers (**PLC**) and distributed control system (**DCS**) applications that require multiple voltage inputs. It boasts **open wire detection** and has **HART**-compatible, 4 mA to 20 mA current inputs, all protected from transient overvoltage or overcurrent events, suitable for the most harsh industrial environments.
+The [[ADI>EVAL-AD7124-8-PMDZ]] is a minimalist 8-Channel, Low Noise, Low Power, 24-Bit, Sigma-Delta ADC (Analog to Digital Converter) with PGA and Reference, SPI Pmod board for the [[ADI>AD7124-8]]. This module is designed as a low-cost alternative to the fully-featured [[ADI>AD7124-8]] evaluation board and has no extra signal conditioning for the ADC.
-The circuit can be divided into the following parts: the ADC, the input channels, the HART modem and the memory.
+The initial configuration of the **ADuCM3029_demo_ad7124_8PMDZ** engages all inputs in a mix of differential and single-ended channels. The input assignation to channels is the following:
-The **ADC** is the core of the **EVAL-CN0414-ARDZ** shield. It is an [[adi>AD4111]] with 8 single or 4 differential voltage channels and 4 current channels. The input channels in this application are configured as 4 differential voltage channels and the current channels. The application maintains 8 internal registers, one for each channel, that are updated periodically, on a timer interrupt, with the latest conversion results. This way, on a single read, the user can have the data on a channel without waiting for a conversion.
+  * Channel 0: AIN0-AIN1, differential;
-{{ :resources:eval:user-guides:eval-adicup3029:reference_designs:cn0414_timer_diagram.png?nolink |Timer diagram}}
+  * Channel 1: AIN2-AIN3, differential;
-Alternatively the user can request a burst read of up to 2000 samples returned at the ADC output data rate.
+  * Channel 2: AIN4-AIN5, differential;
-The application uses the **ADCs Open-Wire Detection** capabilities for the voltage channels. When activated this option also tracks the state of the channel connection on every read and gives a warning when a channel is disconnected.
+  * Channel 3: AIN6-AIN7, differential;
+  * Channel 4: AIN8-AIN9, differential;
+  * Channel 5: AIN10-AIN11, differential;
+  * Channel 6: AIN12-AIN13, differential;
+  * Channel 7: AIN14-AIN15, differential;
+  * Channel 8: AIN0-AGND, single-ended;
+  * Channel 9: AIN1-AGND, single-ended;
+  * Channel 10: AIN2-AGND, single-ended;
+  * Channel 11: AIN3-AGND, single-ended;
+  * Channel 12: AIN4-AGND, single-ended;
+  * Channel 13: AIN5-AGND, single-ended;
+  * Channel 14: AIN6-AGND, single-ended;
+  * Channel 15: AIN7-AGND, single-ended;
-The **EVAL-CN0414-ARDZ** is **HART** capable. When this option is activated the current channels can be used to transmit or receive **HART** messages or command zero and receive response. The system is capable of receiving messages asynchronously using a **GPIO** interrupt.
+By default only channel 0 is active at first, but this can be adjusted using the appropriate CLI commands (described below). At first all channels are using the configuration register 0 which is set to sinc4 filter option and the first option of PGA corresponding to the widest range. The filter sample rate is set at maximum. Each configuration register has a different PGA setting so that each channel can be set using the CLI to any PGA. The demo does this by assigning each channel to the corresponding configuration register that contains the desired PGA setting. Most of the demo CLI commands work in this configuration, but the CLI also offers access to the individual registers for the user to set the desired configuration manually.
-The system also includes an EEPROM memory that communicates with the controller via **I2C** and can be used to store data or identification information for the board. The memory can be used to uniquely identify the board in a system of 4 similar boards (**EVAL-CN0414-ARDZ** or **EVAL-CN0418-ARDZ**) controlled by the same **EVAL-ADICUP3029**.
 ===== Demo Requirements =====
@@ Line 32: / Line 32: @@
   * Hardware
     * EVAL-ADICUP3029
-    * EVAL-CN0414-ARDZ
+    * EVAL-AD7124-8-PMDZ
     * Mirco USB to USB cable
     * PC or Laptop with a USB port
-    * 24V and 1A limited power supply (**optional**)
   * Software
-    * [[https://github.com/analogdevicesinc/EVAL-ADICUP3029/tree/master/projects/ADuCM3029_demo_cn0414 | AduCM3029_demo_cn0414 demo application]]
+    * [[https://github.com/analogdevicesinc/EVAL-ADICUP3029/tree/master/projects/ADuCM3029_demo_ad7124_8PMDZ | ADuCM3029_demo_ad7124_8PMDZ demo application]]
-    * CrossCore Embedded Studio (2.8.0 or higher)
+    * CrossCore Embedded Studio (2.9.1 or higher)
     * ADuCM302x DFP (3.2.0 or higher)
     * ADICUP3029 BSP (1.1.0 or higher)
@@ Line 46: / Line 45: @@
 ===== Setting up the Hardware =====
-  - Connect **EVAL-CN0414-ARDZ** board to the **EVAL-ADICUP3029**.
+  - Connect **EVAL-AD7124-8-PMDZ** board to the **EVAL-ADICUP3029**. {{ :resources:eval:user-guides:eval-adicup3029:reference_designs:ad7124_pmod_unplug.jpg |}}
-  - Set the jumpers into the position shown below. This is the standard position and only works for one board systems.{{ :resources:eval:user-guides:eval-adicup3029:reference_designs:cn0414_jumper_pos2.jpg?nolink |Standard jumper position}}
+  - Connect a micro-USB cable to P10 connector of the EVAL-ADICUP3029 and connect it to a computer. The final setup should look similar to the picture below. {{ :resources:eval:user-guides:eval-adicup3029:reference_designs:ad7124_pmod_plug.jpg |}}
-  - Connect a micro-USB cable to P10 connector of the EVAL-ADICUP3029 and connect it to a computer. The final setup should look similar to the picture below.{{ :resources:eval:user-guides:eval-adicup3029:reference_designs:eval_cn0414_ardz_hard_setup3.jpg?nolink |Hardware setup example}}
 ===== Configuring the Software =====
-The configuration parameters can be found in the **config.h** file.
+The software needs no configuration.
-**vref** - Reference voltage of the **ADC**. If the internal reference is used this value must be **2.5V**. If an external reference is used then this value must be the value of the external reference.
-^ Referece                  ^ vref value  	       ^
-| internal                  | 2.5 	               |
-| external                  | Actual reference voltage |
-<code>
-   /* Reference voltage of the ADC */
-   float vref = 2.5;
-</code>
 ===== Outputting Data =====
@@ Line 74: / Line 62: @@
 ^ Function ^ Command ^ Description ^ Example ^
 ^ General commands ^  ^  ^  ^
-|  | //h//                  | Display available commands. 	|   |
+| Help | //**h**//                  | Display available commands. 	|   |
-|  | //stts//               | Display parameters of the application. |  |
+| Reset | //**rst**//               | Reset the application.\\ <//opt//> = 'dev' to perform only a device reset; do not include to perform an application reset. | **rst dev** - perform only device reset (datasheet defaults); \\ **rst** - perform application reset (application defaults). |
-^ Internal register commands ^  |  |  |
+^ ADC commands ^  ^  ^  ^
-|  | //r//                  | Display voltage or current on the selected channel.\\ <//chan//> = channel to be shown |  |
+| Register read | //**arr**//                  | Read an ADC register of a specific address.\\ <//addr//> = Address of the register to be read in hexadecimal base. | **arr 2a** - Read register 0x2A |
-|  | //sur//                | Change channel update rate.\\ <rate> = new channel update rate in Hz.\\ If it is bigger than output data rate divided by 80 can cause unpredictable behaviour. |  |
+| Register write | //**awr**//                | Write an ADC register of a specific address with a new value.\\ <//addr//> = Address of the register to be written in hexadecimal base.\\ <//val//> = New value of the register. | **arw 9 8002** - Write 0x8002 to register 0x9. |
-^ HART commands ^  |  |  |
+| Get data | //**ags**//                | Get a number of samples per enabled channels. If the operation takes too long press 'q' to abort.\\ <//no//> = Number of samples (maximum 2048). If sample rate is smaller than 3000 setting the argument 0 or no argument means continuous streaming. |  |
-|  | //he//                 | Enable HART channel. |  |
+| Enable channels | //**aces**//                | Choose ADC channels to be activated.\\ <//mask//> = 16-bit mask of the channels to be activated. Can be hexadecimal or binary.\\ A bit of 1 means activated the channel, a bit of 0 means deactivate\\ the channel. | **aces 0xAAAA** - activate every other channel. '0x' is necessary for hexadecimal interpretation. |
-|  | //hd//                 | Disable HART channel. |  |
+| Get enabled channels | //**aceg**//                | Get enable status of ADC channels. Returns a hexadecimal 16-bit mask where bits of 1 represent enabled channels, and bits of 0 represent disabled channels. |  |
-|  | //hcc//                | Select wanted channel.\\ <//chan//> = Channel to be selected. |  |
+| Set PGA | //**aps**//                | Set PGA for a channel.\\ <//chan//> = ID of the channel to be changed.\\ <//opt//> = PGA option; values are: opt0, opt1, ... opt7 corresponding to the datasheet. | **aps 0 opt3** - set ADC channel 0 to PGA 3, gain value of 8. |
-|  | //ht//                 | Transmit string through HART.\\ <//string//> = string to be transmitted. |  |
+| Get PGA | //**apg**//                | Display a channel's PGA option; return values are: opt0, opt1, ... opt7 corresponding to the datasheet.\\ <//chan//> = ID of the channel to be read. | **apg 0** - read the PGA value of channel 0. |
-|  | //hg//                 | Send the received buffer through UART connection. |  |
+| Set sample\\ rate | //**aos**//                | Set ADC sample rate. Filter option, power mode and reference clock must be taken into consideration.\\ <//odr//> = New sample rate value. | **aos 2000** - set sample rate to 2000 samples per second. |
-|  | //hcz//                | Send command zero with the specified number of FFs in the preambule.\\ <//pbsize//> = size of the preambule (no. of 0xFFs in the beginning). |  |
+| Get sample rate | //**aog**//                | Read the current sample rate. |  |
-|  | //hpt//                | Send command zero with the specified number of FFs in the preambule.\\ <//byte//> = byte to send in loop. |  |
+| Set filter\\ option | //**afs**//                | Set ADC filter option.\\ <//opt//> = filter option; can be: 'sinc4', 'sinc3', 'fflt4', 'fflt3' and 'postf'.\\ <//post//> = post-filter option; can be: 'opt0', 'opt1', ... 'opt3'; add only when opt=postf. | **afs fflt4** - set filter option to fast settling sinc4. |
-^ ADC commands |  |  |
+| Get filter\\ option | //**afg**//                | Read the current filter. |  |
-|  | //arr//                | Display value of ADC register of the given address.\\ <//reg//> = address of the register. |  |
-|  | //awr//                | Change value of the ADC register of the given address.\\ <//reg//> = address of the register.\\ <//val//> = new value of the register. |  |
-|  | //ags//                | Get a specific number of samples from the given channel.\\ <//ch//> = selected chanel.\\ <//nr//> = number of channels; cannot exceed 2048. |  |
-|  | //aso//                | Set sample rate.\\ <//sps//> = selected sample rate option.\\ If it is smaller than channel update rate multiplied by 80 can cause unpredictable behaviour. |  |
-|  | //asf//                | Set filter option.\\ <//filter//> = selected filter option. |  |
-|  | //aep//                | Enable post filter. |  |
-|  | //adp//                | Select postfilter.\\ <//opt//> = selected postfilter option. |  |
-|  | //asp//                | Reset controller, parameters and faults |  |
-|  | //aowe//               | Enable open wire detection. |  |
-|  | //aowd//               | Disable open wire detection. |  |
-^ EEPROM commands ^  |  |  |
-|  | //de//                 | Discover EEPROM I2C addresses if there are any. |  |
-{{ :resources:eval:user-guides:eval-adicup3029:reference_designs:eval_cn0414_console.png?nolink | Terminal example}}
+{{ :resources:eval:user-guides:eval-adicup3029:reference_designs:ad71248pmdz_terminal_sample.png |}}
-===== Obtaining the Source Code =====
+===== Obtaining the Software =====
-We recommend not opening the project directly, but rather import it into CrossCore Embedded Studios and make a local copy in your workspace.
+There are two basic ways to program the ADICUP3029 with the software for the AD7124-8 PMOD.
+  - Dragging and Dropping the .Hex to the Daplink drive
+  - Building, Compiling, and Debugging using CCES
-The source code and include files of the **ADuCM3029_demo_cn0414** can be found here:
+Using the drag and drop method, the software is going to be a version that Analog Devices creates for testing and evaluation purposes.  This is the EASIEST way to get started with the reference design
-<WRAP round 80% download>
+Importing the project into CrossCore is going to allow you to change parameters and customize the software to fit your needs, but will be a bit more advanced and will require you to download the CrossCore toolchain.
-[[https://github.com/analogdevicesinc/EVAL-ADICUP3029/tree/master/projects/ADuCM3029_demo_cn0414| AduCM3029_demo_cn0414 at Github]]
+The software for the **ADuCM3029_demo_ad7124_8PMDZ** can be found here:
-[[| AduCM3029_demo_cn0414.HEX]]
+<WRAP round 80% download>
+Prebuilt AD7124-8 PMOD Hex File
+  * [[https://github.com/analogdevicesinc/EVAL-ADICUP3029/releases/download/Latest/ADuCM3029_demo_ad7124_8PMDZ.hex| ADuCM3029_demo_ad7124_8PMDZ.Hex]]
+Complete AD7124-8 PMOD Source Files
+  * [[https://github.com/analogdevicesinc/EVAL-ADICUP3029/tree/master/projects/ADuCM3029_demo_ad7124_8PMDZ| ADuCM3029_demo_ad7124_8PMDZ Source Code]]
 </WRAP>
@@ Line 131: / Line 113: @@
 ==== Project Structure ====
-The program is composed of two main parts:
+The application contains the platform drivers with the sources in **platform_source** and the headers in **platform_include**. In the **src** root directory there is the ad7124 driver as found on Github, but with a custom initialization vector in **ad7124_regs** module.
-  - Board setup with initial values.
-  - Main process.
-{{ :resources:eval:user-guides:eval-adicup3029:reference_designs:cn0414_main_flowchart.png?nolink | Main flow chart}}
-Board setup initializes **UART**, **SPI** and **I2C** communication and verifies if there is an active **EVAL-CN0414-ARDZ** board connected by reading the AD4111 ID register. Here is also initialized the update timer for the internal channel registers.
-{{ :resources:eval:user-guides:eval-adicup3029:reference_designs:cn0414_board_setup_flow.png?nolink | Board setup flow chart}}
-The main process routine implements the **CLI** and calls the commands input by the user. This routine also checks the flags asserted in the asynchronous events (the update channel register flag, the HART received flag and the floating channel flags) and calls the appropriate handler methods. There is also a flag asserted by the channel register update rate and the **ADC** output data rate. If the update rate would be too close to the output data rate, the actual update rate might slow down to be possible for the program to maintain all functionality. The update rate may never be bigger or equal to the **ADC** output data rate divided by 8 (for 8 channels).
-{{ :resources:eval:user-guides:eval-adicup3029:reference_designs:cn0414_process_flow.png?nolink | Process flow chart}}
-The flow chart below represents the way the channel registers are updated. Only one channel is active at any one time (the channel that must be read).
-{{ :resources:eval:user-guides:eval-adicup3029:reference_designs:cn0414_update_channel_flow.png?nolink | Update channel flow chart}}
+{{ :resources:eval:user-guides:eval-adicup3029:reference_designs:ad7124pmdz_file_structure.png |}}
 // End of Document //

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