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| resources:eval:user-guides:adrv9009-zu11eg:syncronization [15 Jun 2021 14:39] – [Clock distribution] Michael Hennerich | resources:eval:user-guides:adrv9009-zu11eg:syncronization [17 Jun 2021 09:17] – [Clock distribution] Michael Hennerich |
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| | dts | [[linux.github>master?arch/arm64/boot/dts/xilinx/zynqmp-adrv9009-zu11eg-revb-adrv2crr-fmc-revb-sync-jesd204-fsm-multisom-primary.dts | zynqmp-adrv9009-zu11eg-revb-adrv2crr-fmc-revb-sync-jesd204-fsm-multisom-primary.dts]] | | | dts | [[linux.github>master?arch/arm64/boot/dts/xilinx/zynqmp-adrv9009-zu11eg-revb-adrv2crr-fmc-revb-sync-jesd204-fsm-multisom-primary.dts | zynqmp-adrv9009-zu11eg-revb-adrv2crr-fmc-revb-sync-jesd204-fsm-multisom-primary.dts]] | |
| | dts | [[linux.github>master?arch/arm64/boot/dts/xilinx/zynqmp-adrv9009-zu11eg-revb-adrv2crr-fmc-revb-sync-jesd204-fsm-multisom-secondary.dts | zynqmp-adrv9009-zu11eg-revb-adrv2crr-fmc-revb-sync-jesd204-fsm-multisom-secondary.dts]] | | | dts | [[linux.github>master?arch/arm64/boot/dts/xilinx/zynqmp-adrv9009-zu11eg-revb-adrv2crr-fmc-revb-sync-jesd204-fsm-multisom-secondary.dts | zynqmp-adrv9009-zu11eg-revb-adrv2crr-fmc-revb-sync-jesd204-fsm-multisom-secondary.dts]] | |
| | | dts | [[linux.github>master?arch/arm64/boot/dts/xilinx/zynqmp-adrv9009-zu11eg-revb-adrv2crr-fmc-revb-sync-fmcomms8-jesd204-fsm-multisom-primary.dts | zynqmp-adrv9009-zu11eg-revb-adrv2crr-fmc-revb-sync-fmcomms8-jesd204-fsm-multisom-primary.dts]] | |
| | | dts | [[linux.github>master?arch/arm64/boot/dts/xilinx/zynqmp-adrv9009-zu11eg-revb-adrv2crr-fmc-revb-sync-fmcomms8-jesd204-fsm-multisom-secondary.dts | zynqmp-adrv9009-zu11eg-revb-adrv2crr-fmc-revb-sync-fmcomms8-jesd204-fsm-multisom-secondary.dts]] | |
| ==== Clock distribution ==== | ==== Clock distribution ==== |
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| This method is referred as **clock distribution**. All lower level clock-chips receive their input clock via ''FIN''/CLKIN1 and are synced via ''RFSYNC''/CLKIN0. | This method is referred as **clock distribution**. All lower level clock-chips receive their input clock via ''FIN''/CLKIN1 and are synced via ''RFSYNC''/CLKIN0. |
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| Depending on your [[resources:eval:user-guides:adrv9009-zu11eg:adrv2crr-fmc_carrier_board|ADRV2CRR-FMC]] Carrier Board Hardware revision following stuffing options need to be checked. | Depending on your [[resources:eval:user-guides:adrv9009-zu11eg:adrv2crr-fmc_carrier_board|ADRV2CRR-FMC]] Carrier Board Hardware revision following stuffing options need to be checked. These are required to route ''RFSYNC'' DC coupled to the from SMA connectors J5 RFSYNC_P, J6 RFSYNC_N to the HMC7044 ''RFSYNC'' input. |
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| | C289 | bypass/short | | | C289 | bypass/short | |
