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resources:eval:user-guides:adrv9009-zu11eg:adrv2crr-fmc_carrier_board [08 Mar 2021 18:54] – Adding Rev C STP file Brian OLoughlinresources:eval:user-guides:adrv9009-zu11eg:adrv2crr-fmc_carrier_board [13 Sep 2021 11:07] – [FMC Connector] Claudia Goga
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-ADRV2CRR-FMC Carrier Board Hardware Overview+===== ADRV2CRR-FMC Carrier Board Hardware Overview =====
  
 {{:resources:eval:user-guides:adrv9009_zu11eg:adrv2crr-fmc_desc.png|}} {{:resources:eval:user-guides:adrv9009_zu11eg:adrv2crr-fmc_desc.png|}}
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 Information on getting started and links to access the system software provided is contained on the main [[/resources/eval/user-guides/adrv9009-zu11eg|RF-SOM Wiki-page]]. Information on getting started and links to access the system software provided is contained on the main [[/resources/eval/user-guides/adrv9009-zu11eg|RF-SOM Wiki-page]].
  
 +==== Power Input ====
 +The ADRV2CRR-FMC has a single 12V supply input, distributed to the internal power supplies and interface connectors. Included in the package is a 12V, 145W power supply, which powers the complete prototyping platform built out of [[adi>ADRV9009-ZU11EG]], [[adi>ADRV2CRR-FMC]] and [[adi>AD-FMCOMMS8-EBZ]].
 +There are four LEDs that show the status of the power supplies: PG_ALL, PG_SOM, PWR_FAULT1 and PWR_FAULT2. A detailed description of these signals is available in the [[resources:eval:user-guides:adrv9009-zu11eg:hardware|ADRV9009-ZU11EG RF-SOM Hardware Overview]] page.
 +----
 +==== ZU11EG Ultrascale+ Configuration ====
 +=== Boot Mode Pins ===
 +Slide switches (S13 - S16) select the boot source of the Xilinx ZU11EG Ultrascale+.
 +      * Mode Pins [3:0]    0000    JTAG
 +      * Mode Pins [3:0]    0010    Quad-SPI (32b)
 +      * Mode Pins [3:0]    1110    SD1 (3.0)
 +{{ :resources:eval:user-guides:adrv9009_zu11eg:btn_boot.png?200 |}}
 +=== SD Card ===
 + * SD card selection S9 switches between carrier and SOM SD card connector
 +{{ :resources:eval:user-guides:adrv9009-zu11eg:adrv9009-zu11g-sd-card-select.png?200 |}}
 +=== JTAG ===
 +The JTAG connector P7 is a 2x14 pin header intended to fit the Xilinx Platform Cable.
 +----
 +==== RF-SOM Interface Connectors ====
 +The interface to the ADRV9009-ZU11EG consists of two SAMTEC SEARAY™ 400-pin connectors (P12 and P14). For a detailed description of the signal interface visit the [[resources:eval:user-guides:adrv9009-zu11eg:hardware|ADRV9009-ZU11EG RF-SOM Hardware Overview]] page.
 +----
 +==== FMC Connector ====
 +The ADRV2CRR-FMC includes a standard ANSI/VITA 57.1 FMC high-pin count connector P1, which is partially populated. Following signals are present:
 +  * 10 serial transceiver lanes FMC_HPC_DPx, 2x serial transceiver reference clock FMC_HPC_GBTCLKx
 +  * 34 differential IO pairs FMC_HPC_LAx, 2 differential clocks FMC_HPC_CLK0/1_M2C
 +  * JTAG, I2C interfaces
 +
 +
 +FMC HA and HB differential signals are not populated with user-defined digital IOs as specified in the FMC HPC standard. Instead, RF reference clock signals, synchronization signal, and ADRV9009 IOs are connected to these positions to enhance the capability of the P1 connector by providing the possibility:
 +  * to add extra ADRV9009 transceivers to the system, and synchronize these with the RF-SOM. This is accomplished with the [[adi>AD-FMCOMMS8-EBZ]]
 +  * to design custom RF boards that make use of the analog and digital ADRV9009 IOs.
 +
 +<note important>All the previous mentioned ADRV9009 IOs, and reference clocks are connected to P1 through 0 Ohm jumpers (JP8-JP91). If an FMC mezzanine card is connected, which conflicts with these signals remove the 0 Ohm jumpers. For the synchronization signal SYNC_OUT2 remove R21 </note>
 +
 +
 +----
 +==== IO Expansion Connector ====
 +----
 +==== Interfaces ====
 The following table outlines levels of functionality provided in software for the I/O interfaces on the carrier board. The following table outlines levels of functionality provided in software for the I/O interfaces on the carrier board.
  
 {{:resources:eval:user-guides:adrv9009_zu11eg:carrier_io.png|}} {{:resources:eval:user-guides:adrv9009_zu11eg:carrier_io.png|}}
 +----
 +==== Clock Inputs =====
 +----
 +==== Fan Control ====
 +----
 +==== Audio ====
 +----
  
 <WRAP round download> <WRAP round download>
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 </WRAP> </WRAP>
- 
-===== ADRV2CRR-FMC Hardware ===== 
  
 ==== Revision Options ==== ==== Revision Options ====
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 </WRAP> </WRAP>
 ==== Switches/Jumpers ==== ==== Switches/Jumpers ====
-  * Boot mode switches (S13-S16) + 
-      * Mode Pins [3:0]    0010    Quad-SPI (32b) +
-      * Mode Pins [3:0]    1110    SD1 LS (3.0) +
-{{ :resources:eval:user-guides:adrv9009_zu11eg:btn_boot.png?200 |}} +
-  * SD card selection (S9) - switch between carrier and SOM SD card connector +
-{{ :resources:eval:user-guides:adrv9009-zu11eg:adrv9009-zu11g-sd-card-select.png?200 |}}+
   * USB PHY configuration (the only supported configuration)   * USB PHY configuration (the only supported configuration)
 {{ :resources:eval:user-guides:adrv9009_zu11eg:jmp_usb.png?200 |}} {{ :resources:eval:user-guides:adrv9009_zu11eg:jmp_usb.png?200 |}}
resources/eval/user-guides/adrv9009-zu11eg/adrv2crr-fmc_carrier_board.txt · Last modified: 25 Sep 2023 16:13 by Brian OLoughlin