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--- resources:eval:user-guides:adrv9002:quickstart:zynq [25 Nov 2021 10:39] – [LVDS support] Laszlo Nagy
+++ resources:eval:user-guides:adrv9002:quickstart:zynq [25 Nov 2021 10:43] – [LVDS support] Laszlo Nagy
@@ Line 12: / Line 12: @@
 ===== LVDS support =====
-According to '[[https://www.xilinx.com/support/documentation/user_guides/ug471_7Series_SelectIO.pdf|7 Series Select IO guide]]' Table 1-43  the LVDS I/O standard (with VADJ 1.8V) is not supported on High Range banks.
+According to [[https://www.xilinx.com/support/documentation/user_guides/ug471_7Series_SelectIO.pdf|7 Series Select IO guide]] section 'LVDS and LVDS_25' and Table 1-43 the LVDS I/O standard (VADJ 1.8V) is not supported on High Range banks.
 Since the evaluation board can operate only with VADJ set to 1.8V and the FMC connector on the carrier (ZC706,Zedborad) is mapped to HR banks the **<fc #ff0000>LVDS interface is not supported</fc>**.

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