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| resources:eval:user-guides:adin1300-and-adin1200:ksz8081_to_adin1200_phy_exchange_guide [17 Oct 2021 17:31] – cr Catherine Redmond | resources:eval:user-guides:adin1300-and-adin1200:ksz8081_to_adin1200_phy_exchange_guide [17 Oct 2021 21:21] – cr Catherine Redmond | ||
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| <WRAP group> | <WRAP group> | ||
| <WRAP half column> | <WRAP half column> | ||
| - | ===== HARDWARE CONFIGURATION | + | ===== Hardware Configuration |
| Both devices have a number of strapping options to enable managed or unmanaged configurations of the PHY function such as PHY address, mode of operation, Auto-Negotiation and MAC Interface. | Both devices have a number of strapping options to enable managed or unmanaged configurations of the PHY function such as PHY address, mode of operation, Auto-Negotiation and MAC Interface. | ||
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| <WRAP group> | <WRAP group> | ||
| <WRAP half column> | <WRAP half column> | ||
| - | ===== PACKAGE | + | ===== Package |
| Both the ADIN1200 and the KSZ8081 are available in a 32 lead QFN/LFCSP package of 5 mm x 5mm body size. The devices have different pinouts, therefore the ADIN1200 is not a drop-in replacement for the Microchip product. This requires edits to the schematic and board layout to achieve this exchange. | Both the ADIN1200 and the KSZ8081 are available in a 32 lead QFN/LFCSP package of 5 mm x 5mm body size. The devices have different pinouts, therefore the ADIN1200 is not a drop-in replacement for the Microchip product. This requires edits to the schematic and board layout to achieve this exchange. | ||
| The underside of the LFCSP package for the ADIN1200 includes an exposed paddle which should be soldered directly to the board with an array of vias for thermal purposes. There are also two exposed stripes adjacent to the exposed paddle. These do not need to be soldered to the board, they should be treated as a keepout area as they are connected to supply rails in the device, therefore should not be tied to ground and there should be no routing or traces on the PCB layer directly underneath them. | The underside of the LFCSP package for the ADIN1200 includes an exposed paddle which should be soldered directly to the board with an array of vias for thermal purposes. There are also two exposed stripes adjacent to the exposed paddle. These do not need to be soldered to the board, they should be treated as a keepout area as they are connected to supply rails in the device, therefore should not be tied to ground and there should be no routing or traces on the PCB layer directly underneath them. | ||
| - | ===== OTHER PINOUT CONSIDERATIONS | + | ===== Other Pinout Considerations |
| ==== Integrated MDI Termination ==== | ==== Integrated MDI Termination ==== | ||
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| <WRAP half column> | <WRAP half column> | ||
| - | ===== SOFTWARE CONSIDERATIONS | + | ===== Software Considerations |
| Both devices can be hardware strapped to be used in an unmanaged configuration. Alternatively, | Both devices can be hardware strapped to be used in an unmanaged configuration. Alternatively, | ||
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| ---- | ---- | ||
| - | ===== EXAMPLE CONFIGURATION FOR RMII ===== | + | ===== Example Configurations for RMII ===== |
| The following example captures how to configure the ADIN1200 for an unmanaged configuration with RMII Interface, operating in Auto-negotiation mode advertising all speeds. The PHY will power up in this state, ready to establish a link with a link partner. | The following example captures how to configure the ADIN1200 for an unmanaged configuration with RMII Interface, operating in Auto-negotiation mode advertising all speeds. The PHY will power up in this state, ready to establish a link with a link partner. | ||
| The MAC interface configuration pins (MACIF_SEL0/ | The MAC interface configuration pins (MACIF_SEL0/ | ||
| The following list summarizes an RMII auto negotiate, 10 Mbps or 100 Mbps full duplex or half duplex: | The following list summarizes an RMII auto negotiate, 10 Mbps or 100 Mbps full duplex or half duplex: | ||
| - | * • MAC Interface = RMII | + | * MAC Interface = RMII |
| - | * • MACIF_SEL0 = MODE_1 = 10 kΩ pull-up resistor | + | * MACIF_SEL0 = MODE_1 = 10 kΩ pull-up resistor |
| - | * • MACIF_SEL1 = MODE_1 = 10 kΩ pull-up resistor | + | * MACIF_SEL1 = MODE_1 = 10 kΩ pull-up resistor |
| - | * • MDIX_MODE = automatic MDIX, preferred MDIX | + | * MDIX_MODE = automatic MDIX, preferred MDIX |
| - | * • MDIX_MODE = MODE_3 | + | * MDIX_MODE = MODE_3 |
| - | * • PHY address = 0b0001 | + | * PHY address = 0b0001 |
| - | * • Speed selection = 10 Mbps, 100 Mbps with full duplex or half duplex, auto-negotiation enabled | + | * Speed selection = 10 Mbps, 100 Mbps with full duplex or half duplex, auto-negotiation enabled |
| - | * • PHY_CFG0 = MODE_4 = 10 kΩ pull-up resistor | + | * PHY_CFG0 = MODE_4 = 10 kΩ pull-up resistor |
| - | * • PHY_CFG1 = MODE_1 = 10 kΩ pull-down resistor | + | *PHY_CFG1 = MODE_1 = 10 kΩ pull-down resistor |
| {{ : | {{ : | ||
resources/eval/user-guides/adin1300-and-adin1200/ksz8081_to_adin1200_phy_exchange_guide.txt · Last modified: 19 Jun 2023 17:33 by Mark Bolger