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resources:eval:user-guides:ad9656:reference_hdl [11 Dec 2020 12:40] – edited download support Dan Hotoleanuresources:eval:user-guides:ad9656:reference_hdl [07 Jan 2021 12:40] (current) – modified the AD9656EBZ in the introduction section. added a link to the AD9656 board evaluation page to the more information section. added link to the ad9656 board to the supported devices section. deleted part of the build section and added a link to th Dan Hotoleanu
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 ====== AD9656 HDL Reference Design ====== ====== AD9656 HDL Reference Design ======
 +
 +===== Introduction =====
 +
 +The [[adi>AD9656]] is a quad 16-bit, 125MSPS analog-to-digital converter (ADC) with an on-chip sample and hold circuit designed for low cost, low power, small size, and ease of use. The [[adi>en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/EVAL-AD9656.html#eb-overview|AD9656EBZ]] board is build around the AD9656 chip and it pairs with a carrier board through a FMC connector. The ADC chip uses the JESD204B protocol to transfer the data to the carrier board. The SPI protocol is used by the carrier board to configure the parameters from the register file of the ADC and the two clock chips.
 +
 +===== Supported Devices =====
 +
 +  * [[adi>en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/EVAL-AD9656.html#eb-overview|AD9656EBZ]]
 +
 +===== Supported Carriers =====
 +
 +Until now our recommended plaform is the Zynq based system:
 +
 +  * [[xilinx>ZCU102]] 
  
 ===== Functional Overview ===== ===== Functional Overview =====
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 The device control and monitor signals are interfaced to a GPIO module. The SPI signals are controlled by a separate AXI based SPI core. The device control and monitor signals are interfaced to a GPIO module. The SPI signals are controlled by a separate AXI based SPI core.
  
-===== Supported Carriers =====+===== Building the HDL ======
  
-These are the supported carriers for the HDL - not the complete package (software and HDL). Typically the software lags behind the HDL, so if you don't see the these listed on the main project page - it is not yet done.+ADI does not distribute the bit/elf files of these projects so they must be built from the sources available [[https://github.com/analogdevicesinc/hdl|here]]. To get the source you must [[https://git-scm.com/book/en/v2/Git-Basics-Getting-a-Git-Repository|clone]] the HDL repository. Then go to the /projects/ad9656_fmc/zcu102 location and run the make command by typing in your command prompt:
  
-Our recommended plaforms are the Zynq based systems:+**Linux**
  
-  * [[xilinx>ZCU102]] +<code> 
 +dhotolea@analog:~$ cd hdl/projects/ad9656_fmc/zcu102 
 +dhotolea@analog:~/hdl/projects/ad9656_fmc/zcu102$ make 
 +</code> 
 + 
 +A more comprehensive build guide can be found in the [[/resources/fpga/docs/hdl|HDL User Guide]].  
 + 
 +===== More information ===== 
 + 
 +  * [[resources/eval/user-guides/ad9656/software/baremetal|AD9656 no-OS User Guide]] 
 +  * [[resources/eval/ad9656-125ebz|AD9656 Board User Guide]]
  
 ===== Download ====== ===== Download ======
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 {{page>resources/fpga/docs/hdl/downloads_insert#help_support}} {{page>resources/fpga/docs/hdl/downloads_insert#help_support}}
  
-{{navigation AD9656#Hardware#.:|Reference HDL Design#Software}} 
resources/eval/user-guides/ad9656/reference_hdl.1607686848.txt.gz · Last modified: 11 Dec 2020 12:40 by Dan Hotoleanu

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