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resources:eval:user-guides:ad7616-sdz [08 Mar 2017 15:26] – [No-OS Downloads] Add Support section Istvan Csomortaniresources:eval:user-guides:ad7616-sdz [20 Mar 2018 16:44] – Fix a few grammar mistakes Istvan Csomortani
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 The [[adi>AD7616]] is a 16-bit, data acquisition system (DAS) that supports dual simultaneous sampling of 16 channels. The [[adi>AD7616]] operates from a single 5 V supply and can accommodate ±10 V, ±5 V, and ±2.5 V true bipolar input signals while sampling at throughput rates up to 1 MSPS per channel pair with 90 dB SNR. Higher SNR performance can be achieved with the on-chip oversampling mode; 92 dB for an oversampling ratio of 2. The [[adi>AD7616]] is a 16-bit, data acquisition system (DAS) that supports dual simultaneous sampling of 16 channels. The [[adi>AD7616]] operates from a single 5 V supply and can accommodate ±10 V, ±5 V, and ±2.5 V true bipolar input signals while sampling at throughput rates up to 1 MSPS per channel pair with 90 dB SNR. Higher SNR performance can be achieved with the on-chip oversampling mode; 92 dB for an oversampling ratio of 2.
  
-The input clamp protection circuitry can tolerate voltages up to ±20 V. The [[adi>AD7616]] has 1 MΩ analog input impedance regardless of sampling frequency. The single supply operation, on-chip filtering, and high input impedance eliminate the need for driver op amps and external bipolar supplies.+The input clamp protection circuitry can tolerate voltages up to ±20 V. The [[adi>AD7616]] has 1 MΩ analog input impedance regardless of sampling frequency. The single supply operation, on-chip filtering, and high input impedance eliminate the need for driver op-amps and external bipolar supplies.
  
-Each device contains analog input clamp protection, a dual, 16-bit charge redistribution successive approximation analog-to-digital converter (ADC), a flexible digital filter, a 2.5 V reference and reference buffer, and high speed serial and parallel interfaces.+Each device contains analog input clamp protection, a dual, 16-bit charge redistribution successive approximation analog-to-digital converter (ADC), a flexible digital filter, a 2.5 V reference and reference buffer, and high-speed serial and parallel interfaces.
  
 Applications: Applications:
-  * Power line monitoring+  * Powerline monitoring
   * Protective relays   * Protective relays
   * Multiphase motor control   * Multiphase motor control
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 ==== Required software ==== ==== Required software ====
-  * We're upgrade the Xilinx tools on every release. The supported version number can be found in our [[https://github.com/analogdevicesinc/hdl/releases | git repository ]].  +  * We're upgrading the Xilinx tools on every release. The supported version number can be found in our [[https://github.com/analogdevicesinc/hdl/releases | git repository ]].  
   * An UART terminal (Tera Term/Hyperterminal), baud rate set to 115200.   * An UART terminal (Tera Term/Hyperterminal), baud rate set to 115200.
  
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   * all the control pins of the device are driven by GPIO's   * all the control pins of the device are driven by GPIO's
  
-In order to build the HDL design the user have to go through the following steps:+In order to build the HDL design the user has to go through the following steps:
   - Confirm that you have the right tools (see [[https://github.com/analogdevicesinc/hdl/releases|Release notes]])   - Confirm that you have the right tools (see [[https://github.com/analogdevicesinc/hdl/releases|Release notes]])
-  - Clone the HDL github repository (see https://wiki.analog.com/resources/fpga/docs/git)+  - Clone the HDL GitHub repository (see https://wiki.analog.com/resources/fpga/docs/git)
   - Choose the required interface (see caption **Switching between interface types**)   - Choose the required interface (see caption **Switching between interface types**)
   - Build the project (see https://wiki.analog.com/resources/fpga/docs/build)   - Build the project (see https://wiki.analog.com/resources/fpga/docs/build)
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 ==== Switching between interface types ==== ==== Switching between interface types ====
  
-Before power-up the board, the user has to choose the required device interface and setup, in function of the required interface mode some hardware modification needs to be done on the board and/or tcl script:+Before power-up the board, the user has to choose the required device interface and setup, in function of the required interface mode some hardware modification needs to be done on the board and/or Tcl script:
  
 1) In case of the **SERIAL** interface: 1) In case of the **SERIAL** interface:
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 ===== Create the SDK Project ===== ===== Create the SDK Project =====
  
-To run the application the user have to create an **Empty Application Project** using Xilinx SDK, and have to copy all the [[https://github.com/analogdevicesinc/no-OS/tree/2016_R2/ad7616-sdz|design sources]] to the **sw** directory. (see [[https://wiki.analog.com/resources/fpga/xilinx/software_setup|SDK Software Setup]] for more detailed instructions)+To run the application the user has to create a**Empty Application Project** using Xilinx SDK, and have to copy all the [[https://github.com/analogdevicesinc/no-OS/tree/2016_R2/ad7616-sdz|design sources]] to the **sw** directory. (see [[https://wiki.analog.com/resources/fpga/xilinx/software_setup|SDK Software Setup]] for more detailed instructions)
  
  
resources/eval/user-guides/ad7616-sdz.txt · Last modified: 26 Jan 2024 11:55 by Esteban Blanc

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