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====== EVAL-AD7134FMCZ HDL Reference Design ======

===== Overview =====

The HDL reference design for the EVAL-AD7134FMCZ provides all the interfaces that are necessary to interact with the device using a Xilinx FPGA development board.

The design has all the necessary infrastructure to acquire data from both AD7134 24-bit 4-channel precision alias free ADC devices, supporting continuous data capture at maximum 1.5 MSPS data rate. The design targeted to the Zedboard, which is a low cost FPGA carrier board from Digilent, using a Zynq-7000 re-programmable SoC from Xilinx.

==== Used devices ====

  * [[ADI>AD7134|AD7134]]

==== Evaluation board ====

  * [[adi>en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/eval-ad7134fmcz.html|EVAL-AD7134FMCZ]]

==== Supported FPGA carrier ====

  * [[https://www.avnet.com/wps/portal/us/products/avnet-boards/avnet-board-families/zedboard/|Zedboard]]

==== Jumper setup ====

^ Jumper/Solder link ^ Position ^ Description ^
| JP14  | Mounted | DEC0/DCLKIO |
| JP15  | Mounted | DEC0/DCLKIO |
| JP16  | Mounted | MODE |
| JP17  | Mounted | MODE |

===== HDL Design Description =====

The design is built upon ADI's generic HDL reference design framework. 
More information about the framework can be found in the [[:resources/fpga/docs/hdl|ADI Reference Designs HDL User Guide]] wiki page.

The reference design uses the [[/resources/fpga/peripherals/spi_engine|SPI Engine Framework]] to interface with the two AD7134 ADCs. 

The design only supports the slave mode for both devices with both DCLK and ODR generated by the FPGA. Each device sends data on 4 of the 8 DIN bits.

{{:resources:fpga:docs:ad713x_hdl_6.svg|spi engine block diagram}}

In order to build the HDL design the user has to go through the following steps:
  - Confirm that you have the right tools (see [[https://github.com/analogdevicesinc/hdl/releases|Release notes]])
  - Clone the HDL GitHub repository (see https://wiki.analog.com/resources/fpga/docs/git)
  - Build the project (see https://wiki.analog.com/resources/fpga/docs/build)

===== HDL Downloads =====

<WRAP round download 50%>
  * {{https://github.com/analogdevicesinc/hdl/tree/master/projects/ad7134_fmc|AD713x HDL Project.}}
</WRAP>

===== Software sources =====

<WRAP round download 50%>

  * [[:resources:tools-software:uc-drivers:ad713x | AD713x - No-OS Driver]]

</WRAP>
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