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| resources:eval:user-guides:ad5758 [22 May 2018 09:31] – updated RANGE_0mA_20mA value Stefan Popa | resources:eval:user-guides:ad5758 [10 May 2019 14:56] – Add HDL design section Istvan Csomortani |
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| ====== AD5758 - No-OS Driver ====== | ====== AD5758 - Reference Design ====== |
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| ===== Supported Devices ===== | ===== Supported Devices ===== |
| * [[adi>AD5758]] | * [[adi>AD5758]] |
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| | ===== Supported FPGA carrier board ===== |
| | * [[http://zedboard.org/product/zedboard|Zedboard]] |
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| ===== Overview ===== | ===== Overview ===== |
| The [[adi>AD5758]] is a single-channel, voltage and current output digital-to-analog converter (DAC) that operates with a power supply range from −33 V minimum on AVSS to +33 V maximum on AVDD1 with a maximum operating voltage between the two rails of 60 V. On-chip DPC minimizes package power dissipation, which is achieved by regulating the supply voltage (VDPC+) to the VIOUT output driver circuitry from 5 V to 27 V using a buck dc-to-dc converter, optimized for minimum on-chip power dissipa-tion. The CHART pin enables a HART signal to be coupled onto the current output. | The [[adi>AD5758]] is a single-channel, voltage and current output digital-to-analog converter (DAC) that operates with a power supply range from −33 V minimum on AVSS to +33 V maximum on AVDD1 with a maximum operating voltage between the two rails of 60 V. On-chip DPC minimizes package power dissipation, which is achieved by regulating the supply voltage (VDPC+) to the VIOUT output driver circuitry from 5 V to 27 V using a buck dc-to-dc converter, optimized for minimum on-chip power dissipation. The CHART pin enables a HART signal to be coupled onto the current output. |
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| The device uses a versatile 4-wire serial peripheral interface (SPI) that operates at clock rates of up to 50 MHz and is compatible with standard SPI, QSPI™, MICROWIRE™, DSP, and microcontroller interface standards. The interface also features an optional SPI cyclic redundancy check (CRC) and a watchdog timer. The [[adi>AD5758]] offers improved diagnostic features from its predecessors, such as output current monitoring and an integrated 12-bit diagnostic ADC. Additional robustness is provided by the inclusion of a fault protection switch on VIOUT, +VSENSE, and −VSENSE pins. | The device uses a versatile 4-wire serial peripheral interface (SPI) that operates at clock rates of up to 50 MHz and is compatible with standard SPI, QSPI™, MICROWIRE™, DSP, and micro-controller interface standards. The interface also features an optional SPI cyclic redundancy check (CRC) and a watchdog timer. The [[adi>AD5758]] offers improved diagnostic features from its predecessors, such as output current monitoring and an integrated 12-bit diagnostic ADC. Additional robustness is provided by the inclusion of a fault protection switch on VIOUT, +VSENSE, and −VSENSE pins. |
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| Applications: | Applications: |
| * PLC and DCS applications | * PLC and DCS applications |
| * HART network connectivity | * HART network connectivity |
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| | ===== HDL reference design ===== |
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| | The HDL project is only needed if the used carrier board is an FPGA board. The project uses a Zedboard and its hardware interfaces. There isn't any custom logic in the programmable side of the Zynq 7000 SoC. |
| | To clone or download the HDL repository, go the Download section of this wiki page. |
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| | To find more information about how to create and build the project please visit the [[https://wiki.analog.com/resources/fpga/docs/build|HDL build guide]]. |
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| | To find more information about how to create the application project in Xilinx SDK please visit the following page: https://wiki.analog.com/resources/fpga/xilinx/software_setup |
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| ===== Driver Description ===== | ===== Driver Description ===== |
