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+====== AD-FMCOMMS6-EBZ Hardware ======
+===== Picture and Main components =====
+{{ :resources:fpga:xilinx:fmc:fmcomms6:main_components.jpg?direct&600 }}
+===== Outline =====
+For those that don't want to load up the Allegro viewer, here is a basic outline/component placements of the board.
+{{:resources:fpga:xilinx:fmc:fmcomms6:fmcomms6_top.jpg?direct&400  |  }}
+===== Size =====
+The size of the board (not including the SMA connectors, which project beyond the edge of the board) is 3.42 inches by 2.72 inches (or about 89mm x 69mm). This exceeds the FMC specifications of 84mm x 69mm).
+{{:resources:fpga:xilinx:fmc:fmcomms6:fmcomms6_dim.jpg?direct&400  |  }}
+===== Downloads =====
+<WRAP round download 80%>
+^ Type ^ Rev 1D ^
+| Schematic | {{:resources:fpga:xilinx:fmc:fmcomms6:fmcomms6_radx1d.pdf|Rev1D Schematic}} |
+| Assembly Files | {{:resources:fpga:xilinx:fmc:fmcomms6:cn-0331_rev1d_mfg.zip|Rev1D Assembly Files}} |
+| Build Files | {{:resources:fpga:xilinx:fmc:fmcomms6:radx1d_archive.zip|Rev1D Build Files}} |
+| Allegro Board File | {{:resources:fpga:xilinx:fmc:fmcomms6:fmcomms6_radx1d_board_file.zip|Rev1D Allegro Board File}} |
+| Block Diagram | {{:resources:fpga:xilinx:fmc:fmcomms6:radx_rev1b_block_diagram020814.pdf|Block Diagram}} |
+| Power Budget | {{:resources:fpga:xilinx:fmc:fmcomms6:power_budget_021714.pdf|Power Budget}} |
+| Noise Analysis | {{:resources:fpga:xilinx:fmc:fmcomms6:noiseanalysis_adl5380_adl5566-ad9652.xls|Noise Analysis}} |
+  * Get the [[http://www.cadence.com/products/pcb/Pages/downloads.aspx|Allegro FREE Physical Viewer]] (You need 16.5 or higher).
+</WRAP>

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