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resources:eval:user-guides:ad-fmcomms2-ebz:software:matlab_bsp [03 Jan 2021 21:46] – fix links Robin Getz | resources:eval:user-guides:ad-fmcomms2-ebz:software:matlab_bsp [09 Jan 2021 00:32] (current) – user interwiki links Robin Getz | ||
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====== Analog Devices BSP for MathWorks HDL Workflow Advisor ====== | ====== Analog Devices BSP for MathWorks HDL Workflow Advisor ====== | ||
- | <note warning> | + | <note warning> |
The Analog Devices BSP for MathWorks HDL Workflow Advisor is a collection of board definitions and reference designs that provide to the MathWorks HDL Workflow Advisor support to: | The Analog Devices BSP for MathWorks HDL Workflow Advisor is a collection of board definitions and reference designs that provide to the MathWorks HDL Workflow Advisor support to: | ||
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* Automatically insert the generated IPs into the Analog Devices Vivado HDL reference designs | * Automatically insert the generated IPs into the Analog Devices Vivado HDL reference designs | ||
- | The Analog Devices BSP is based on the [[http:// | + | The Analog Devices BSP is based on the [[mw>help/ |
===== Supported platforms ===== | ===== Supported platforms ===== | ||
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===== Functionality ===== | ===== Functionality ===== | ||
- | The [[http:// | + | The [[mw>help/ |
The Analog Devices BSP for HDL Workflow Advisor extends the set of Target Workflows for IP Core Generation with the Analog Devices boards listed in the //Supported Platforms// section. The BSP consists of a set of board definitions that specify all the characteristics needed by the HDL Workflow Advisor to be able to incorporate a board in the code generation flow, as well as a set of Xilinx Vivado reference designs that are used by the Workflow Advisor to automatically insert the generated IPs into the Vivado designs. All the Analog | The Analog Devices BSP for HDL Workflow Advisor extends the set of Target Workflows for IP Core Generation with the Analog Devices boards listed in the //Supported Platforms// section. The BSP consists of a set of board definitions that specify all the characteristics needed by the HDL Workflow Advisor to be able to incorporate a board in the code generation flow, as well as a set of Xilinx Vivado reference designs that are used by the Workflow Advisor to automatically insert the generated IPs into the Vivado designs. All the Analog | ||
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<WRAP round download 85%> | <WRAP round download 85%> | ||
- | [[http:// | + | [[mw>matlabcentral/ |
- | [[http:// | + | [[mw>matlabcentral/ |
</ | </ | ||
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<WRAP round help 80%> | <WRAP round help 80%> | ||
- | * Questions? [[https:// | + | * Questions? [[/ |
</ | </ | ||