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resources:eval:user-guides:ad-fmcomms1-ebz:interface_timing_validation [02 Jan 2013 21:34] – fix spacing Robin Getzresources:eval:user-guides:ad-fmcomms1-ebz:interface_timing_validation [09 Feb 2021 16:08] (current) – add retired Robin Getz
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 ====== Digital Interface Timing Verification ====== ====== Digital Interface Timing Verification ======
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 Both the [[adi>AD9122]] and the [[adi>AD9643]] have very tight FPGA <-> converter digital interface timing requirements. Ensuring that things work over voltage, temperature with different PCB carrier boards is a challenge. To meet this challenge, we use the on-chip verification of both the ADC and the DAC to ensure that good data is sent and received. Both the [[adi>AD9122]] and the [[adi>AD9643]] have very tight FPGA <-> converter digital interface timing requirements. Ensuring that things work over voltage, temperature with different PCB carrier boards is a challenge. To meet this challenge, we use the on-chip verification of both the ADC and the DAC to ensure that good data is sent and received.
  
resources/eval/user-guides/ad-fmcomms1-ebz/interface_timing_validation.txt · Last modified: 09 Feb 2021 16:08 by Robin Getz