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resources:eval:user-guides:ad-fmcmotcon2-ebz:hardware:controller_board [26 Mar 2015 11:28] – [Features and Block Diagram] Andrei Cozma | resources:eval:user-guides:ad-fmcmotcon2-ebz:hardware:controller_board [28 Jan 2021 19:56] (current) – update arrow links after their web site update Robin Getz | ||
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* BISS Interface | * BISS Interface | ||
+ | |< 100% 100% >| | ||
+ | ^ ^ | ||
===== Block Diagram ===== | ===== Block Diagram ===== | ||
{{: | {{: | ||
+ | |< 100% 100% >| | ||
+ | ^ ^ | ||
===== Picture and Main Components ===== | ===== Picture and Main Components ===== | ||
- | {{: | + | {{: |
- | {{: | + | {{: |
|< 100% 100% >| | |< 100% 100% >| | ||
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^ Measurement | ^ Measurement | ||
- | | **[[adi>AD7401A]]** | 5 kV rms, isolated 2nd order Sigma-Delta modulator | | + | | **[[adi>AD8137]]** | Differential ADC driver |
- | | **[[adi> | + | |
| **[[adi> | | **[[adi> | ||
| **[[adi> | | **[[adi> | ||
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| **[[adi> | | **[[adi> | ||
| **[[adi> | | **[[adi> | ||
- | | **[[adi> | ||
^ Isolation | ^ Isolation | ||
- | | **[[adi> | + | | **[[adi> |
+ | | **[[adi> | ||
+ | | **[[adi> | ||
+ | | **[[adi> | ||
^ Voltage Translation | ^ Voltage Translation | ||
| **[[adi> | | **[[adi> | ||
^ Multiplexers | ^ Multiplexers | ||
- | | **[[adi> | ||
| **[[adi> | | **[[adi> | ||
- | ^ | + | ^ Communication |
+ | | **[[adi> | ||
| **88E1512** | Marvell Integrated 10/100/1000 Mbps Energy Efficient Ethernet Transceiver | | | **88E1512** | Marvell Integrated 10/100/1000 Mbps Energy Efficient Ethernet Transceiver | | ||
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^ ^ | ^ ^ | ||
- | ===== Jumper settings ===== | ||
- | {{: | ||
- | |< 100% 25% 40% 35% >| | ||
- | ^ Sensor Selection | ||
- | | **Back EMF** | P9 - position 0 | P20 - position 0 | | ||
- | | **Single ended Hall** | P9 - position 1 | P20 - position 0 | | ||
- | | **Differential Hall** | P9 - position 0 | P20 - position 1 | | ||
- | | **Reserved** | P9 - position 1 | P20 - position 1 | | ||
- | ^ Resolver Configuration Mode ^^^ | ||
- | | **Normal Mode - Position input** | P3 - Not inserted | P5 - Not inserted | | ||
- | | **Normal Mode - Velocity input** | P3 - Not inserted | P5 - Inserted | | ||
- | | **Reserved** | P3 - Inserted | P5 - Not inserted | | ||
- | | **Configuration Mode** | P3 - Inserted | P5 - Inserted | | ||
- | ^ Resolver Resolution Settings | ||
- | | **10 Bits** | P4 - Not inserted | P6 - Not inserted | | ||
- | | **12 Bits** | P4 - Not inserted | P6 - Inserted | | ||
- | | **14 Bits** | P4 - Inserted | P6 - Not inserted | | ||
- | | **16 Bits** | P4 - Inserted | P6 - Inserted | | ||
- | ^ PHYs Configuration | ||
- | | **2.5V VDDO, different PHY addresses** | P11 & P12 - Position 0 | P9 - Inserted | | ||
- | |< 100% 100% >| | ||
- | ^ ^ | ||
- | ===== LEDs ===== | ||
- | |||
- | ^ LED ^ Description ^ | ||
- | | DS1 | FMC 3.3V Power Good | | ||
- | | DS2 | Vadj Power Good | | ||
- | | DS3 | 5V Power Good | | ||
- | | DS7 | 12V Power Good | | ||
- | |||
- | |< 100% 100% >| | ||
- | |||
- | |< 100% 100% >| | ||
- | ^ ^ | ||
- | ===== Power Map ===== | ||
- | {{: | ||
- | |||
- | |< 100% 100% >| | ||
- | ^ ^ | ||
===== ADC FPGA Interface ===== | ===== ADC FPGA Interface ===== | ||
{{ : | {{ : | ||
- | The AD7401 | + | The AD7403 |
* 10 / 20 MHz clock input | * 10 / 20 MHz clock input | ||
* 1 bit digital data stream output | * 1 bit digital data stream output | ||
- | The reconstruction of the data provided by the AD7401 | + | The reconstruction of the data provided by the AD7403 |
Typical filter output characteristics: | Typical filter output characteristics: | ||
* Output code: 16 bit | * Output code: 16 bit | ||
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|< 100% 100% >| | |< 100% 100% >| | ||
^ ^ | ^ ^ | ||
- | ===== Position & Speed Sensors FPGA Interface ===== | ||
- | **Single digital interface for multiple position sensors** | ||
- | * Single Ended HALL | ||
- | * Differential HALL | ||
- | * BEMF | ||
- | * Encoder | ||
- | |||
- | **3 digital signals between HW and the FPGA** | ||
- | * HALL A / BEMF A / Encoder Channel A | ||
- | * HALL B / BEMF B / Encoder Channel B | ||
- | * HALL C / BEMF C / Encoder Index | ||
- | |||
- | Sensor selection is done with jumpers on the controller board. The hardware conditions the analog signals and sends clean digital signals to the FPGA. | ||
- | |||
- | |< 100% 100% >| | ||
- | ^ ^ | ||
===== Downloads ===== | ===== Downloads ===== | ||
<WRAP round download 85%> | <WRAP round download 85%> | ||
- | **AD-FMCMOTCON1-EBZ** | + | **AD-FMCMOTCON2-EBZ** |
- | * {{: | + | * {{: |
- | * {{: | + | * {{: |
- | * {{: | + | * {{: |
</ | </ | ||
{{navigation AD-FMCMOTCON2-EBZ# | {{navigation AD-FMCMOTCON2-EBZ# |