This version (12 Sep 2011 15:54) was approved by Jean McAdam.The Previously approved version (18 May 2011 15:23) is available.
TWI/I2C : TWO WIRE INTERFACE
The TWI / I2C bus is fully compatible with the widely used I2C bus standard as defined by Philips I2C Bus Specification version 2.1.
Pull up Resistors are present on both the SDA and SCL lines, so the lines will idle high at all times.
Data Rates:up to 100K bits/second (Standard Mode)and up to 400K bits/second (Fast Mode)data rates
| Pin Blackfin Name | Pin SDP 120 Pin Connector Name | Description |
|---|---|---|
| SDA | SDA_0 | In/Out TWI serial data, high impedance reset value |
| SCL | SCL_0 | In/Out TWI serial clock, high impedance reset value |
Table 1: I2C Pin Assignments
Figure 1 : I2C Start & Stop Conditions
Normal Data Transfer
S = Start
P = Stop
| S | 7-BIT ADDRESS | R/W | ACK | 8-BIT DATA | ACK | P |
|---|
Repeated Start
A repeated start is where the control of the bus is help by the current master between two consecutive transfers. It is the absense of a stop command betwen two transfers. Transfers can be of any direction.
| S | 7-BIT ADDRESS | R/W | ACK | 8-BIT DATA | ACK | S | 7-BIT ADDRESS | R/W | ACK | 8-BIT DATA | ACK | P |
|---|
resources/eval/sdp/sdp-b/peripherals/twi.txt · Last modified: 12 Sep 2011 15:54 by Jean McAdam