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====== SDP-H1 for High-Speed DAC Evaluation ======
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The SDP-H1 platform is used to evaluate many types of Analog Devices components and systems. The information on this page applies only to High-Speed DAC evaluation.
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The SDP-H1 is a device designed to support the evaluation of Analog Devices' High-Speed Digital-to-Analog Converters (DAC). The device is connected to a PC over USB, and allows a user to download a data vector into the SDP-H1, which is then played out to an attached DAC evaluation board.

**Please note:** //Analog Devices' pattern generators and high-speed DAC evaluation boards are designed and sold solely to support an efficient and thorough means by which to evaluate Analog Devices high speed DACs in a lab environment for a wide range of end applications. Any application or use of the pattern generators and/or high-speed DAC evaluation boards, other than specified above, will not be supported.//

This page describes the hardware of SDP-H1. The device can be driven from many different software applications. For more information on the software, please see the [[resources:eval:dpg:dacsoftwaresuite|High-Speed DAC Software Suite]] documentation.

For information on other models of DAC pattern generators, please see the [[resources:eval:dpg|DPG page]].

====== Ordering Code ======

The part number for the SDP-H1 is EVAL-SDP-CH1Z.

To order an SDP-H1, please visit the [[adi>en/system-demonstration-platform/controller-boards/evaluation/EVAL-SDP-H1/eb.html#buy|SDP-H1 Ordering Page]]

====== Hardware Specifications ======
//Please note that not all hardware options and specifications are supported with any particular evaluation board or software package. Specifications are subject to change without notice.//
  * Converter Interfaces
    * CMOS Interface
      * 32-bits (shared with the P lines of the LVDS bus)
      * Up to 300Mbps per bit(SDR)
      * Same connector and pinout as [[resources:eval:dpg:dpg3|DPG3]] when paired with the [[adi>en/evaluation/AD-DAC-FMC/eb.html|DAC FMC Adapter]].
    * LVDS Interface
      * 32-bits (P lines shared with CMOS interface)
      * Up to 740Mbps per line (370MHz DDR) when used with evaluation boards with interface widths of 16 lines or less. Up to 370Mbps (185MHz DDR) when used with evaluation boards with interface widths greater than 16lines (up to a maximum of 32 lines).
      * Same connector and pinout as [[resources:eval:dpg:dpg3|DPG3]] when paired with the [[adi>en/evaluation/AD-DAC-FMC/eb.html|DAC FMC Adapter]].
  * Memory
    * 64MB DDR2 Discrete Memory
  * PC Interface
    * USB 2.0 "B" connector
  * Specified for operation at 25ºC only

<WRAP info>Some PCs with USB 3.0 //SuperSpeed// ports have been unable to communicate reliably with the SDP-H1. On these PCs, the standard USB 2.0 ports (without the {{:resources:eval:dpg:500px-usb_3.0_icon.png?nolink&50|}} logo) should be used with the SDP-H1.</WRAP>

====== Connector Pinouts ======
The SDP-H1 platform utilizes the standard VITA 57.1 "FMC-LPC" connector. See the [[http://www.vita.com/fmc|VITA FMC page]] for more information.

====== Firmware Update ======
The firmware of the SDP-H1 is updated automatically every time the platform is used. No user interaction is required.

====== Support ======
Please contact [[mailto:dpg.support@analog.com|DPG Support]] with any additional questions regarding the DPG or DAC Software Suite.

Please contact [[mailto:ace.support@analog.com|ACE Support]] if you are using [[resources:tools-software:ace:dpg-lite|DPG Lite]] with [[resources:tools-software:ace|ACE]].
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