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| resources:eval:dpg:eval-ad9148 [28 Jan 2012 00:32] – Approved Jason Coutermarsh | resources:eval:dpg:eval-ad9148 [16 Jun 2023 10:07] (current) – John Marco Mina |
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| ======AD9148 Evaluation Board====== | ======EVALUATING THE AD9148 DIGITAL-TO-ANALOG CONVERTER====== |
| In addition to the [[adi>AD9148]], the evaluation boards also come with clocking and analog quadrature modulator circuits to ease system level solutions. The AD9148 evaluation board comes in two models; the AD9148-M5372-EBZ has the ADL5372 modulator on board, and the AD9148-M5375-EBZ has the ADL5375 modulator on-board. To operate the evaluation boards, the user must apply power, a clock source, a digital data source, and be able to observe the DAC output on either a spectrum analyzer or an oscilloscope. A low jitter sine or square wave clock will work well as a source. The evaluation board comes with software which allows the user to program the SPI port. Via the SPI port, the DUT and clock circuitry can be programmed into any of its various operating modes. | |
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| Documentation and software updates for using High-Speed DAC Evaluation Boards are included in individual, self-extracting update files. | =====Preface===== |
| =====Files included in the AD9148 Update:===== | This user guide describes both the hardware and software setup needed to acquire data capture from [[adi>eval-ad9148|AD9148-EBZ & AD9148-M5375-EBZ]] evaluation board to characterize [[adi>AD9148]] Quad 16-bit 1GSPS TxDAC+® digital-to-analog converter. |
| * SPI Application | |
| * DPGDownloader Panel | |
| * [[ftp://ftp.analog.com/pub/HSSP_SW/HSCDAC/Documents/AD9148/AD9148 Evaluation Board Quick Start Guide.pdf|Quick Start Guide]] | |
| * [[adi>static/imported-files/data_sheets/AD9148.pdf|AD9148 Data Sheet]] | |
| * [[adi>Analog_Root/static/techSupport/designTools/ibisModels/license/ibis_general.html?ibs=ad9148.ibs|IBIS Model]] | |
| * Schematics [[ftp://ftp.analog.com/pub/HSSP_SW/HSCDAC/Documents/AD9148/AD9148-ADL5372-EBZ RevA Schematic.pdf|AD9148-ADL5372-EBZ RevA]][[ftp://ftp.analog.com/pub/HSSP_SW/HSCDAC/Documents/AD9148/AD9148-ADL5375-EBZ RevA Schematic.pdf|AD9148-ADL5375-EBZ RevA]][[ftp://ftp.analog.com/pub/HSSP_SW/HSCDAC/Documents/AD9148/AD9148-EBZ RevB Schematic.pdf|AD9148-EBZ RevB]][[ftp://ftp.analog.com/pub/HSSP_SW/HSCDAC/Documents/AD9148/AD9148-M5372-EBZ RevA Schematic.pdf|AD9148-M5372-EBZ RevA]][[ftp://ftp.analog.com/pub/HSSP_SW/HSCDAC/Documents/AD9148/AD9148-M5375-EBZ RevB Schematic.pdf|AD9148-M5375-EBZ RevB]] | |
| * Bill of Materials [[ftp://ftp.analog.com/pub/HSSP_SW/HSCDAC/Documents/AD9148/AD9148-ADL5372-EBZ RevA BOM_customer.xls|AD9148-ADL5372-EBZ RevA]][[ftp://ftp.analog.com/pub/HSSP_SW/HSCDAC/Documents/AD9148/AD9148-ADL5375-EBZ RevA BOM_customer.xls|AD9148-ADL5375-EBZ RevA]][[ftp://ftp.analog.com/pub/HSSP_SW/HSCDAC/Documents/AD9148/AD9148-EBZ RevB BOM_customer.xls|AD9148-EBZ RevB]][[ftp://ftp.analog.com/pub/HSSP_SW/HSCDAC/Documents/AD9148/AD9148-M5372-EBZ RevA BOM_customer.xls|AD9148-M5372-EBZ RevA]][[ftp://ftp.analog.com/pub/HSSP_SW/HSCDAC/Documents/AD9148/AD9148-M5375-EBZ RevB BOM_customer.xls|AD9148-M5375-EBZ RevB]] | |
| * PCB Gerber files [[ftp://ftp.analog.com/pub/HSSP_SW/HSCDAC/Documents/AD9148/AD9148-ADL5372-EBZ RevA Gerber Files.zip|AD9148-ADL5372-EBZ RevA]][[ftp://ftp.analog.com/pub/HSSP_SW/HSCDAC/Documents/AD9148/AD9148-ADL5375-EBZ RevA Gerber Files.zip|AD9148-ADL5375-EBZ RevA]][[ftp://ftp.analog.com/pub/HSSP_SW/HSCDAC/Documents/AD9148/AD9148-EBZ RevB Gerber Files.zip|AD9148-EBZ RevB]][[ftp://ftp.analog.com/pub/HSSP_SW/HSCDAC/Documents/AD9148/AD9148-M5372-EBZ RevA Gerber Files.zip|AD9148-M5372-EBZ RevA]][[ftp://ftp.analog.com/pub/HSSP_SW/HSCDAC/Documents/AD9148/AD9148-M5375-EBZ RevB Gerber Files.zip|AD9148-M5375-EBZ RevB]] | |
| * PCB BRD file [[ftp://ftp.analog.com/pub/HSSP_SW/HSCDAC/Documents/AD9148/AD9148-ADL5372-EBZ RevA.brd|AD9148-ADL5372-EBZ RevA]][[ftp://ftp.analog.com/pub/HSSP_SW/HSCDAC/Documents/AD9148/AD9148-ADL5375-EBZ RevA.brd|AD9148-ADL5375-EBZ RevA]][[ftp://ftp.analog.com/pub/HSSP_SW/HSCDAC/Documents/AD9148/AD9148-EBZ RevB.brd|AD9148-EBZ RevB]][[ftp://ftp.analog.com/pub/HSSP_SW/HSCDAC/Documents/AD9148/AD9148-M5372-EBZ RevA.brd|AD9148-M5372-EBZ RevA]][[ftp://ftp.analog.com/pub/HSSP_SW/HSCDAC/Documents/AD9148/AD9148-M5375-EBZ RevB.brd|AD9148-M5375-EBZ RevB]] | |
| * PCB Layout PDF [[ftp://ftp.analog.com/pub/HSSP_SW/HSCDAC/Documents/AD9148/AD9148-ADL5372-EBZ RevA Layout.pdf|AD9148-ADL5372-EBZ RevA]][[ftp://ftp.analog.com/pub/HSSP_SW/HSCDAC/Documents/AD9148/AD9148-ADL5375-EBZ RevA Schematic.pdf|AD9148-ADL5375-EBZ RevA]][[ftp://ftp.analog.com/pub/HSSP_SW/HSCDAC/Documents/AD9148/AD9148-EBZ RevB Layout.pdf|AD9148-EBZ RevB]][[ftp://ftp.analog.com/pub/HSSP_SW/HSCDAC/Documents/AD9148/AD9148-M5372-EBZ RevA Layout.pdf|AD9148-M5372-EBZ RevA]][[ftp://ftp.analog.com/pub/HSSP_SW/HSCDAC/Documents/AD9148/AD9148-M5375-EBZ RevB Layout.pdf|AD9148-M5375-EBZ RevB]] | |
| |
| Download the [[ftp://ftp.analog.com/pub/HSSP_SW/HSCDAC/HSDAC_Update/HSDACUpdate_AD9148_1.0.4339.20993.exe|AD9148 Update]] | This guide shows how AD9148-EBZ & AD9148-M5375-EBZ works with [[:resources:eval:dpg:hsdac-sdp-h1|SDP-H1]] / [[:resources:eval:ads7-v2|ADS7-V2]] controller boards developed by Analog Devices. Link to the previous user guide document is provided for customers who still have the DPG3 controller board. |
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| {{section>resources:eval:dpg#Data Pattern Generator&nofooter&noindent}} | |
| | <note tip>Tip: Click on any picture in this guide to open an enlarged version.</note> |
| | // |
| | // |
| | |
| | ----- |
| | |
| | =====Typical Setup===== |
| | <WRAP centeralign>{{ :resources:eval:dpg:ad9148-ebz.jpg?600 |}}//Figure 1a. AD9148-EBZ Setup with SDP-H1//</WRAP> |
| | <WRAP centeralign>{{ :resources:eval:dpg:ad9148-m5375-ebz.jpg?600 |}}//Figure 1b. AD9148-M5375-EBZ Setup with SDP-H1//</WRAP> |
| | <WRAP centeralign>{{ :resources:eval:dpg:ad9148-ebz-ads7v2.png?direct&600 |}}//Figure 1c. AD9148-EBZ Setup with ADS7-V2//</WRAP> |
| | <WRAP centeralign>{{ :resources:eval:dpg:ad9148-m5375-ebz-ads7v2.png?direct&600 |}}//Figure 1d. AD9148-M5375-EBZ Setup with ADS7-V2//</WRAP> |
| | |
| | =====Helpful Files:===== |
| | * User Guide for DPG3 users:[[adi>media/en/technical-documentation/user-guides/ad9148-ebz-m5375-ebz-ug-1631.pdf|UG-1631]] |
| | * Datasheet [[adi>media/en/technical-documentation/data-sheets/AD9148.pdf|AD9148]] |
| | * IBIS Model [[adi>en/license/ibis-models?mediaPath=media/en/simulation-models/ibis-models/ad9148.ibs&modelType=ibis-models|AD9148]] |
| | * Schematics {{ :resources:eval:dpg:ad9148-ebz_revb_schematic.pdf |AD9148-EBZ-RevB}} | {{ :resources:eval:dpg:ad9148-m5375-ebz_revb_schematic.pdf |AD9148-M5375-EBZ-RevB}} |
| | * Bill of Materials {{ :resources:eval:dpg:ad9148-ebz_revb_bom_customer.xls |AD9148-EBZ-RevB}} | {{ :resources:eval:dpg:ad9148-m5375-ebz_revb_bom_customer.xls |AD9148-M5375-EBZ-RevB}} |
| | * PCB Gerber Files {{ :resources:eval:dpg:ad9148-ebz_revb_gerber_files.zip |AD9148-EBZ-RevB}} | {{ :resources:eval:dpg:ad9148-m5375-ebz_revb_gerber_files.zip |AD9148-M5375-EBZ-RevB}} |
| | * PCB Board Files {{ :resources:eval:dpg:ad9148-ebz_revb.zip |AD9148-EBZ-RevB}} | {{ :resources:eval:dpg:ad9148-m5375-ebz_revb.zip |AD9148-M5375-EBZ-RevB}} |
| | * PCB Layout {{ :resources:eval:dpg:ad9148-ebz_revb_layout.pdf |AD9148-EBZ-RevB}} | {{ :resources:eval:dpg:ad9148-m5375-ebz_revb_layout.pdf |AD9148-M5375-EBZ-RevB}} |
| | * FAQ [[ez>data_converters/high-speed_dacs/w/documents/18371/ad9148-ebz-sdp-h1-input-data-rate-limitation| AD9148+SDP-H1 Input Data Rate Limitation ]] |
| | |
| | =====Software Needed:===== |
| | * [[:resources:tools-software:ace|Analysis | Control | Evaluation (ACE) Software]] |
| | * [[:resources:tools-software:ace:dpg-lite|DPG Lite]] (installed with ACE) |
| | <note important>Do not install ACE on a computer with DAC Software Suite.</note> |
| | |
| | =====Hardware Needed:===== |
| | * [[adi>eval-ad9148|AD9148-EBZ / AD9148-M5375-EBZ]] Evaluation Board |
| | * [[:resources:eval:dpg:hsdac-sdp-h1|SDP-H1]] (EVAL-SDP-CH1Z) Evaluation Kit / [[:resources:eval:ads7-v2|ADS7-V2]] (ADS7-V2EBZ) Evaluation Kit |
| | * [[adi>AD-DAC-FMC]]-ADP High-Speed DAC Evaluation Board to FMC Adaptor Board |
| | * PC with ACE and DPG Lite Software Applications |
| | * 5Vdc Power Supply |
| | * (2) Banana Plug Cables |
| | * High-Frequency Continuous Wave Generator |
| | * Signal/Spectrum Analyzer |
| | * USB-A to USB-Mini Cable |
| | * (2) SMA Cables |
| | * The following are included in [[:resources:eval:dpg:hsdac-sdp-h1|SDP-H1]] Evaluation Kit: |
| | * 12Vdc Wall Adapter |
| | * USB-A to USB-Mini Cable |
| | * The following are included in [[:resources:eval:ads7-v2|ADS7-V2]] Evaluation Kit: |
| | * 12Vdc Power Supply |
| | * Power Cord |
| | * USB-A to USB-B Cable |
| | |
| | =====Quick Start Guide===== |
| | - Follow the Evaluation setup in Figure 1a, 1b, 1c, and 1d. |
| | * Attach the evaluation board to SDP-H1 / ADS7-V2 FMC connector using the AD-DAC-FMC-ADP adapter board. |
| | * Connect the continuous wave generator for clock input to **J1**. |
| | * Connect the DAC output from **J3** to a signal/spectrum analyzer. |
| | * Connect the evaluation board to PC via USB and to a **5V 1A** power supply via banana plug cables. If using the AD9148-M5375-EBZ evaluation board, increase the supply current limit to **1.5A**. |
| | * Connect SDP-H1/ADS7-V2 to PC via USB and to a **12Vdc power supply**. |
| | * Set clock input to **400MHz** and **3dBm**. |
| | - Open ACE. The board will automatically be recognized by the software. Otherwise, install the plugin for AD9148-EBZ / AD9148-M5375-EBZ evaluation board. Then modify the configuration as shown in Figure 2a and Figure 2b, and click “Apply”. |
| | <WRAP centeralign>{{ :resources:eval:dpg:ad9148-ebz_ace.png?direct |}}//Figure 2a. ACE Initial Configuration Wizard on AD9148-EBZ Evaluation board//</WRAP> |
| | <WRAP centeralign>{{ :resources:eval:dpg:ad9148-m5375-ebz_ace.png?direct |}}//Figure 2b. ACE Initial Configuration Wizard on AD9148-M5375-EBZ Evaluation board//</WRAP> |
| | - Open DPGDownloaderLite. The evaluation board, controller board and **DCO Frequency** of **100MHz** will be automatically recognized by DPG. |
| | - From DPGDownloaderLite, Add Generator Waveforms pulldown menu select Single Tone and apply the settings as shown in Figure 3. Set the **Data Rate** to **100MHz** and **Desired frequency** to **15MHz**. Set **DAC resolution** to the DAC’s number of bits to **16**. Check the "Generate Complex Data (I & Q)" box then uncheck the “Unsigned Data” box. |
| | - Select the in-phase tone from the I Data Vector pulldown menu and the quadrature tone from the Q Data Vector pulldown menu.<WRAP centeralign>{{ :resources:eval:dpg:ad9148-dpgdownloader.png |}}//Figure 3. DPGDownloaderLite Waveform Configuration for AD9148-EBZ / AD9148-M5375-EBZ//</WRAP> |
| | - Press the download arrow and then the play button. The spectrum similar to Figure 4 should appear in the signal/spectrum analyzer. <WRAP centeralign>{{ :resources:eval:dpg:microsoftteams-image_5_.png?600 |}}//Figure 4. AD9148-EBZ FFT for Fdac=400MHz,4x Interpolation Fout=15MHz//</WRAP> |
| | |
| | =====Reconfiguring the Evaluation Board===== |
| | This section details the quick start procedures for setting up the AD9148-EBZ & AD9148-M5375-EBZ evaluation board. Refer to the sections below to configure the power supply and the Reference & synchronization clock, as well as the Hardware provisions for the power supply. |
| | ====Power Supply Configuration==== |
| | The evaluation board has a provision for On-board or external power supply configuration. |
| | ===Internal Power Supply=== |
| | On-board power supply is implemented by default. |
| | **JP1** selects the supply voltage level for IOVDD. Refer to Figure 5. |
| | * When Pin 1 and Pin 2 are connected, IOVDD = **3.3 V** (Default) |
| | * When Pin 2 and Pin 3 are connected, IOVDD = **1.8 V** <WRAP centeralign>{{:resources:eval:dpg:ad9148-ebz-jp1_pin_1.png?350x350}}{{:resources:eval:dpg:ad9148-m5375-ebz-jp1_pin_2.png?360x360}}</WRAP><WRAP centeralign>//Figure 5. AD9148-EBZ JP1/AD9148-M5375-EBZ JP1//</WRAP> |
| | ===External Power Supply=== |
| | To implement external supply configuration, remove the header shunt of six pin jumpers, as shown in Figure 6. Refer to Table 1 for external supply jumper connection.<WRAP centeralign>{{:resources:eval:dpg:ad9148-ebz_pinjumpers_1.png?350x350}}{{:resources:eval:dpg:ad9148-m5375-ebz-pinjuumpers_2.png?380x380}}</WRAP><WRAP centeralign>//Figure 6. AD9148-EBZ/AD9148-M5375-EBZ Pin Jumpers//</WRAP><WRAP centeralign>{{ :resources:eval:dpg:table1.jpg?800 |}}//Table 1. AD9148-EBZ/AD9148-M5375-EBZ Jumper Connection//</WRAP> |
| | ===Other Provisions=== |
| | The AD9148-EBZ and AD9148-M5375-EBZ have test points (TP) to check the power supplies on the board. Measure the supply rail (Red TP) and use the nearest grounding (black TP) as reference. See Table 2 and Table 3 below. |
| | <WRAP centeralign>{{ :resources:eval:dpg:ad9148-ebz_tp_measurement.png?direct&600 |}}//Table 2. AD9148-EBZ TP measurements//</WRAP> |
| | <WRAP centeralign>{{ :resources:eval:dpg:ad9148-m5375-ebz_tp_measurement.png?direct&600 |}}//Table 3. AD9148-M5375-EBZ TP measurements//</WRAP> |
| | ====Reference and Synchronization Clock==== |
| | **JP15** and **JP18** selects the source for the reference and synchronization clock of the AD9148. the on-board clocking is implemented by default. Refer to Figure 7 to reconfigure the reference/ synchronization clock. |
| | * On-board (from AD9516), center pads connected to inner pad. |
| | * Off board (External source), center pads connected to outer pad.<WRAP centeralign>{{ :resources:eval:dpg:ad9148_clockref.png?800 |}}//Figure 7. AD9148-EBZ/AD9148-M5375-EBZ Clock Source Configuration//</WRAP> |
| | |
| | ===== Troubleshooting ===== |
| | This section lists items to check and practices to use when debugging any unexpected performance of a board. If unexpected results occurs: |
| | * Restart the program by stopping pattern generation and issuing a power cycle. Power down the whole system by disconnecting the clock source / continuous wave generator and the supply for the controller (SDP-H1/ADS7-V2EBZ), then power up the system again following the steps in the Quick Start Guide. |
| | * Double check the supply levels indicated in Table 2 and Table 3 in the "Other Provisions" section in [[:resources:eval:dpg:eval-ad9148#power_supply_configuration|Power Supply Configuration Section]]. If the voltages are not within the specified ratings, check if there are problems on component assembly or look for damaged ICs. Re-solder or replace components if necessary. |
| | * If signal amplitude is lower than expected, compare spectrum analyzer settings to the recommended setup in the Quick Start Guide. Check for loose cable connections or try changing SMA-to-BNC cables. Loose connections and cable damage cause impedance mismatch. |
| | * If there is no output at all, check if the power supply voltage drops to lower than 5V. If so, increase the supply current limit to greater than 1A until the voltage stabilizes to 5V. |
| | * If there is still no output, check if clock input to AD9148 is stable by measuring clock leakage. Connect one of the evaluation board outputs to a spectrum analyzer. Boards and the clock source should be powered up but the DAC should not be generating a pattern. A low-power tone should be detected at the clock frequency. Otherwise, the clock source is not properly driving the clock input pins. Try increasing clock source / wave generator output signal level slowly up to 10 dBm. |
