This shows you the differences between two versions of the page.
Both sides previous revisionPrevious revision | |||
resources:eval:dpg:dpg3 [06 Feb 2014 23:24] – Updated ordering link Jason Coutermarsh | resources:eval:dpg:dpg3 [26 Jun 2014 14:42] (current) – [Multi-Unit Synchronization] Jason Coutermarsh | ||
---|---|---|---|
Line 40: | Line 40: | ||
* Trigger | * Trigger | ||
* SMA jack for trigger input or output | * SMA jack for trigger input or output | ||
- | * Multi-Unit Synchronization | ||
- | * Up to four DPG3's may have their LVDS interfaces synchronized together | ||
- | * Requires additional Synchronization Board and cabling | ||
* Specified for operation at 25ºC only | * Specified for operation at 25ºC only | ||
Line 69: | Line 66: | ||
===== Output Trigger ===== | ===== Output Trigger ===== | ||
When set as an output, the trigger will pulse when the playback is running at the beginning of the vector. Therefore, it will pulse every time the vector is looped when in Loop mode, or only once if the unit is in Count mode. | When set as an output, the trigger will pulse when the playback is running at the beginning of the vector. Therefore, it will pulse every time the vector is looped when in Loop mode, or only once if the unit is in Count mode. | ||
- | ====== Multi-Unit Synchronization ====== | ||
- | With the appropriate external synchronization board and cables, up to four DPG3's can be synchronized together when in LVDS mode. One unit is designated as the master, and all units use the master' | ||
- | <WRAP important> | ||
- | |||
- | //Note that the synchronization board and cables used with the DPG2 are not compatible with the DPG3// | ||
- | |||
- | <fs larger> | ||
====== Connector Pinouts ====== | ====== Connector Pinouts ====== | ||
The DGP3 has two separate connector systems for interfacing with evaluation boards. One, for CMOS and LVDS interface DACs, is backwards compatible with the [[resources: | The DGP3 has two separate connector systems for interfacing with evaluation boards. One, for CMOS and LVDS interface DACs, is backwards compatible with the [[resources: |