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--- resources:eval:dpg:ad974x-dpg2-ebz [27 Apr 2018 17:22] – [HARDWARE SETUP (DAC OUTPUT)] Annette Hurman
+++ resources:eval:dpg:ad974x-dpg2-ebz [07 May 2018 16:55] – [DPGDOWNLOADER SOFTWARE] Annette Hurman
@@ Line 21: / Line 21: @@
 Once the DPGDownloader software is installed, the hardware can be connected . A single 5V power supply powers the evaluation board. The power supply should be able to source up to 1A to cover all the board’s operating conditions. A low jitter clock source (< 0.5psec RMS) should be used for the DACCLK. A sinusoidal clock output level of 0 to 4dBm is optimal. By default, the DAC outputs are connected to SMA connectors for evaluation. Both DAC outputs are available. Later in the document, the modifications for observing the modulator output and different clocking options will be shown.
   * The evaluation board plugs directly into the DPG2 or DPG3.
-The PC connects to both the DPG2 and the evaluation board through USB cables as showing in Figure 1 and Figure 2
+The PC connects to both the DPG2 and the evaluation board through USB cables as shown in Figure 1 and Figure 2
-  * The evaluation boards plugs into the AD-DAC-FMC-ADP adapter board that plugs into the SDP-H1.
+  * The evaluation board plugs into the AD-DAC-FMC-ADP adapter board that plugs into the SDP-H1.
 The PC connects to both the SDP-H1 and the evaluation board through USB cables as shown in Figure 3 and Figure 4.
@@ Line 35: / Line 35: @@
 Figure 4. SDP-H1 and AD9747 Evaluation Board
 =====  BASIC HARDWARE SETUP =====
+It is suggested that the basic set-up is verified before making any modifications to the evaluation board.
 Connect the equipment to the AD9747 evaluation board per the following table:
-  * Equipment	Connects to AD9747 Eval Board
+  * Equipment	        Connects to AD9747 Eval Board
   * Power Supply	P5(+5V), P6(GND)
   * Signal Source 	J1(CLOCK IN), Set source to 100MHz, 2dBm output
   * PC USB Cable 	XP2
   * Spectrum Analyzer	J5(IOUT1_P) or J9 (IOUT2_P)
-  * DPG2	P1 and P2
+  * DPG2	        P1 and P2
-  * SDP-H1	J4(FMC connector)
+  * SDP-H1	        J4(FMC connector)
-===== DPGDOWNLOADER SOFTWARE =====
+===== ACE AD9747/6/5/3 EVALUATION SOFTWARE =====
+ Introduction
+The AD9747/6/5/3 Evaluation Board connects to the Analog Devices Digital Pattern Generator (DPG) or System Demonstration Platform (SDP-H1, PN: EVAL-SDP-CH1Z) to allow for quick evaluation of the AD9747/6/5/3. The DPG or SDP-H1 allows the user to create many types of digital vectors and transmit these at speed to the AD9747/6/5/3 in any of the AD9747/6/5/3 operating modes. The AD9747/6/5/3 evaluation board is configured over USB with accompanying PC software.
+Software Installation
+The DAC Software Suite plus AD9747/6/5/3 Update should be installed on the PC prior to connecting the hardware to the PC. The DAC Software Suite is included on the Evaluation Board CD, or can be downloaded from the DPG web site at https://wiki.analog.com/resources/eval/dpg/dacsoftwaresuite. This will install DPGDownloader (for loading vectors into the DPG2) and the AD9747/6/5/3 SPI Controller application. However, ACE, a newer evaluation software from ADI, is the preferred evaluation software over the legacy SPI control graphical user interface (GUI). ACE can be downloaded from the ACE website at www.analog.com/ace. The ACE plug-in for the evaluation board, which is also required, is available for download on the AD9747/6/5/3 eval webpage in the software section at http://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/EVAL-AD9747.html#eb-related software.
+Hardware Setup
+Once the DPGDownloader software is installed, the hardware can be connected as shown below. A single 5V power supply powers the evaluation board. The power supply should be able to source up to 2A to cover all the board’s operating conditions. A low jitter clock source (< 0.5psec RMS) should be used for the DACCLK. A sinusoidal clock output level of 0 to 4dBm is optimal. By default, the DAC outputs are connected to SMA connectors for evaluation. Both DAC outputs are available. Later in the document, the modifications for observing the modulator output and different clocking options will be shown.
+•	The evaluation board plugs directly into the DPG2 or DPG3.
+The PC connects to both the DPG2 and the evaluation board through USB cables as showing in Figure 1 and Figure 2
+•	The evaluation board plugs into the AD-DAC-FMC-ADP adapter board that plugs into the SDP-H1.
+The PC connects to both the SDP-H1 and the evaluation board through USB cables as shown in Figure 3 and Figure 4.
+Figure 1. DPG2 and 1Evaluation Board Bench set-up
+Figure 2. DPG2 and AD9747/6/5/3 Evaluation Board
+Figure 3. SDP-H1 and ad9747/6/5/3 Evaluation Board Bench set-up
+Figure 4. SDP-H1 and ad9747/6/5/3 Evaluation Board
 Power up the DPG and connect the USB cable to the PC. Next, run the DPGDownloader Software. A shortcut will be installed to your Start menu during the installation of the DAC Software Suite. To begin, click on the DPGDownloader shortcut in your Programs menu, typically at Start > Programs > Analog Devices > DPG > DPGDownloader.
 The basic parts of the DPGDownloader window are; Hardware Config Panel, EVB Config, Vector Generation Pull-Down Menu, Vector Palette, Vector Selection Panel and the Download and Play buttons.
@@ Line 64: / Line 85: @@
 {{ :resources:eval:dpg:ad9747-9.png |}}
 ===== Selecting the Modulator Outputs =====
-By default, solder jumpers JP4, JP5, JP6, and JP7 configure the DAC outputs to be observed at SMA outputs J5 and J9. This jumper setting is shown in Figure 6 a). To connect the DAC outputs to the LPF and the ADL537x analog quadrature modulator, the solder jumpers need to be repositioned as shown in Figure 6 b). The modulator output can be observed thru the SMA connector J6 (MODULATED OUTPUT). The modulator LO input can be sourced thru SMA connector J10 (LOCAL OSC INPUT). The clock level into the modulator should be set to about 3dBm.
+By default, solder jumpers JP4, JP5, JP6, and JP7 configure the DAC outputs to be observed at SMA outputs J5 and J9. This jumper setting is shown in Figure 6a). To connect the DAC outputs to the LPF and the ADL537x analog quadrature modulator, the solder jumpers need to be repositioned as shown in Figure 6b). The modulator output can be observed thru the SMA connector J6 (MODULATED OUTPUT). The modulator LO input can be sourced thru SMA connector J10 (LOCAL OSC INPUT). The clock level into the modulator should be set to about 3dBm.
 {{ :resources:eval:dpg:ad9747-10.png |}}
+        Figure 6a) DAC Output Configuration	                     Figure 6b) Modulator Output Configuration
 ===== Eval Board Jumper Options =====
-There are 6 pin jumpers on the evaluation board corresponding to the 6 supplies on the board. They serve as ‘switches’ that determine if the LDOs on board or external supplies are used for each individual supply. They are shunted by default, which means on board LDOs  are used. When an external supply is necessary, pull off the shunt from the corresponding supply and connect the external supply to the SMA test points close to the jumper.
+There are 6 pin jumpers on the evaluation board corresponding to the 6 supplies on the board. They serve as ‘switches’ that determine if the on board LDOs or external supplies are used for each individual supply. They are shunted by default, which means on board LDOs are used. When an external supply is necessary, pull off the shunt from the corresponding supply and connect the external supply to the SMA test points close to the jumper.
 {{ :resources:eval:dpg:ad9747-11.png |}}

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