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resources:eval:dpg:ad917x-fmc-ebz [24 Jun 2020 18:13] – [KCU105 Setup] Eric Chaykovsky | resources:eval:dpg:ad917x-fmc-ebz [19 Nov 2020 23:16] – [NCO-only Mode ("DC Test Mode") Without ADS7/ADS8/KCU105] Arik Landsman | ||
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The outputs of the AD917x can be captured at the SMA connectors: J1 for DAC0; J2 for DAC1; and J3 for CLKOUT. | The outputs of the AD917x can be captured at the SMA connectors: J1 for DAC0; J2 for DAC1; and J3 for CLKOUT. | ||
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+ | Some applications may be more sensitive to clock spurious. To prevent any spurious coupling from the onboard HMC7044 onto the AD917x output, the HMC7044 may be kept in reset: | ||
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+ | - reset the board in ACE (Reset Board button in the " | ||
+ | - in the Wizard, under Eval System Option select chip to configure: " | ||
+ | - Under DC Test Mode, select the option " | ||
+ | - Under SERDES Interface, set the link mode and interpolation (this will apply a clock to the corresponding datapaths. E.g. dual-link to enable both datapath0 and datapath1, that would feed DAC0 and DAC1 respectively) | ||
+ | - Under Clock frequencies, | ||