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resources:eval:dpg:ad9142a-m5372-ebz [15 Jun 2017 19:45] – Bailey Meyerresources:eval:dpg:ad9142a-m5372-ebz [16 Jun 2017 16:02] (current) – Bailey Meyer
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 If the board is connected properly, ACE will detect it and display it on the Start page under //Attached Hardware//. Double click this board. If the board is connected properly, ACE will detect it and display it on the Start page under //Attached Hardware//. Double click this board.
  
-{{ :resources:eval:user-guides:ad9129_detected.png }}+{{ :resources:eval:user-guides:ad9142a_detected_new.png }}
 <WRAP clear> <WRAP clear>
 </WRAP> </WRAP>
-<WRAP centeralign> Figure 3.  Detected AD9129 detected in ACE. The AD9142A will be displayed in the same way. </WRAP>+<WRAP centeralign> Figure 3.  Detected AD9142A-M537x in ACE. </WRAP>
  
-Ensure that the {{:resources:eval:user-guides:connection_icon.png}} button in lower left corner of the subsystem image (located under the //System// tab) is green, meaning the board is connected. If not, click it, select the AD739A, and click //Acquire//. Double click on the subsystem image to reach the board block diagram. +Ensure that the {{:resources:eval:user-guides:connection_icon.png}} button in lower left corner of the subsystem image (located under the "System" tab) is green, meaning the board is connected. If not, click it, select the AD739A, and click "Acquire." Double click on the subsystem image to reach the board block diagram. 
  
-{{ :resources:eval:user-guides:ad9129_system.png }}+{{ :resources:eval:user-guides:ad9142a_system_new.png }}
 <WRAP clear> <WRAP clear>
 </WRAP> </WRAP>
-<WRAP centeralign> Figure 4.  The AD9129 system. The AD9142A will be displayed in the same way. </WRAP>+<WRAP centeralign> Figure 4.  The AD9142A-M537x system. </WRAP>
  
 2. Configure the hardware according to the hardware set-up instructions given in the Hardware Setup section above. Set the frequency of the DAC clock signal generator to 1400MHz, and the output level to 6dBm. The spectrum analyzer can be configured with Center Frequency = 2050 MHz, Span = 200 MHz, and Resolution Bandwidth of 30 kHz. Choose Input Attenuation to be 24dB. This can be adjusted later if indications are that the analyzer is causing degradations. \\ \\ 2. Configure the hardware according to the hardware set-up instructions given in the Hardware Setup section above. Set the frequency of the DAC clock signal generator to 1400MHz, and the output level to 6dBm. The spectrum analyzer can be configured with Center Frequency = 2050 MHz, Span = 200 MHz, and Resolution Bandwidth of 30 kHz. Choose Input Attenuation to be 24dB. This can be adjusted later if indications are that the analyzer is causing degradations. \\ \\
 3. Follow the sequence below to configure the AD9142A using ACE. \\ \\  3. Follow the sequence below to configure the AD9142A using ACE. \\ \\ 
-a. Click //Modify// on the left under //Initial Configuration Summary// in the same tab as the board block diagram. Copy the information from Figure 5, and click //Apply//. \\ \\+a. Click "Modify" on the left under "Initial Configuration Summary" in the same tab as the board block diagram. Copy the information from Figure 5, and click "Apply." \\ \\
  
 <WRAP column 40%> <WRAP column 40%>
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 </WRAP> </WRAP>
  
-b. Double click on the AD9142A component on the board diagram. This brings up the chip diagram. Set all the settings to match those in the chip diagram below, and click //Apply Changes//. Click //Read All// on the upper left of the page if the DLL is not enabled, as indicated by the green light next to //DLL Lock//. See the ACE Software Features section for more information about changing parameters. \\ \\+b. Double click on the AD9142A component on the board diagram. This brings up the chip diagram. Set all the settings to match those in the chip diagram below, and click "Apply Changes." Click "Read All" on the upper left of the page if the DLL is not enabled, as indicated by the green light next to "DLL Lock." See the ACE Software Features section for more information about changing parameters. \\ \\
  
 {{ :resources:eval:user-guides:ad9142a_chipview.png }} {{ :resources:eval:user-guides:ad9142a_chipview.png }}
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 <WRAP centeralign> Figure 7.  Chip block diagram of the AD9142A </WRAP> <WRAP centeralign> Figure 7.  Chip block diagram of the AD9142A </WRAP>
  
-c. Open DPGDownloader. (Start > All Programs > Analog Devices > DPG > DPGDownloader). Ensure that the program detects the AD9142A, as indicated in the //Evaluation Board// drop-down list. For this evaluation board, LVDS is the only valid Port Configuration, and should be selected automatically. If not, select it in the //Port Configuration// drop-down list. The //DCO Frequency// window should show the correct data rate (350 MHz). The actual detected frequency may not be exactly 350 MHz but it should be stable and very close to it as shown in the Figure 8.  \\ \\+c. Open DPGDownloader. (Start > All Programs > Analog Devices > DPG > DPGDownloader). Ensure that the program detects the AD9142A, as indicated in the "Evaluation Board" drop-down list. For this evaluation board, LVDS is the only valid Port Configuration, and should be selected automatically. If not, select it in the "Port Configuration" drop-down list. The "DCO Frequency" window should show the correct data rate (350 MHz). The actual detected frequency may not be exactly 350 MHz but it should be stable and very close to it as shown in the Figure 8.  \\ \\
  
 {{ :resources:eval:user-guides:ad9142a_dpgd.png }} {{ :resources:eval:user-guides:ad9142a_dpgd.png }}
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 <WRAP centeralign> Figure 8. </WRAP> <WRAP centeralign> Figure 8. </WRAP>
  
-d. Click on //Add Generated Waveform//, and then //Single Tone//. A Single Tone panel will be added to the vector list. Enter the sample rate, in this case 350 MHz and the desired frequency, 50MHz. Enter the digital amplitude. In this case, use -14dBFS. Check the //Generate Complex Data (I & Q)// box and uncheck the //Unsigned Data// box. Select the In-Phase data vector in the //I Data Vector// drop down menu and the Quadrature data vector in the //Q Data Vector//. This should match the image above. \\ \\+d. Click on "Add Generated Waveform," and then "Single Tone." A Single Tone panel will be added to the vector list. Enter the sample rate, in this case 350 MHz and the desired frequency, 50MHz. Enter the digital amplitude. In this case, use -14dBFS. Check the "Generate Complex Data (I & Q)" box and uncheck the "Unsigned Data" box. Select the In-Phase data vector in the "I Data Vector" drop down menu and the Quadrature data vector in the "Q Data Vector." This should match the image above. \\ \\
 e. Click Download ({{:resources:eval:dpg:image009.png?direct&|}}) and Play ({{:resources:eval:dpg:image010.png?direct&|}}). \\ \\ e. Click Download ({{:resources:eval:dpg:image009.png?direct&|}}) and Play ({{:resources:eval:dpg:image010.png?direct&|}}). \\ \\
 4. The current on the 5V supply should read about 1310mA. \\ 4. The current on the 5V supply should read about 1310mA. \\
resources/eval/dpg/ad9142a-m5372-ebz.txt · Last modified: 16 Jun 2017 16:02 by Bailey Meyer

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