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resources:eval:dpg:ad9142a-m5372-ebz [15 Jun 2017 17:50] – [Recommended Equipment List] Bailey Meyerresources:eval:dpg:ad9142a-m5372-ebz [16 Jun 2017 16:00] – Bailey Meyer
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 If the board is connected properly, ACE will detect it and display it on the Start page under //Attached Hardware//. Double click this board. If the board is connected properly, ACE will detect it and display it on the Start page under //Attached Hardware//. Double click this board.
  
-{{ :resources:eval:user-guides:ad9129_detected.png }}+{{ :resources:eval:user-guides:ad9142a_detected.png }}
 <WRAP clear> <WRAP clear>
 </WRAP> </WRAP>
-<WRAP centeralign> Detected AD9129 detected in ACE. The AD9142A will be displayed in the same way. </WRAP>+<WRAP centeralign> Figure 3.  Detected AD9142A-M537x in ACE. </WRAP>
  
-Ensure that the {{:resources:eval:user-guides:connection_icon.png}} button in lower left corner of the subsystem image (located under the //System// tab) is green, meaning the board is connected. If not, click it, select the AD739A, and click //Acquire//. Double click on the subsystem image to reach the board block diagram. +Ensure that the {{:resources:eval:user-guides:connection_icon.png}} button in lower left corner of the subsystem image (located under the "System" tab) is green, meaning the board is connected. If not, click it, select the AD739A, and click "Acquire." Double click on the subsystem image to reach the board block diagram. 
  
-{{ :resources:eval:user-guides:ad9129_system.png }}+{{ :resources:eval:user-guides:ad9142a_system.png }}
 <WRAP clear> <WRAP clear>
 </WRAP> </WRAP>
-<WRAP centeralign> The AD9129 system. The AD9142A will be displayed in the same way. </WRAP>+<WRAP centeralign> Figure 4.  The AD9142A-M537x system. </WRAP>
  
 2. Configure the hardware according to the hardware set-up instructions given in the Hardware Setup section above. Set the frequency of the DAC clock signal generator to 1400MHz, and the output level to 6dBm. The spectrum analyzer can be configured with Center Frequency = 2050 MHz, Span = 200 MHz, and Resolution Bandwidth of 30 kHz. Choose Input Attenuation to be 24dB. This can be adjusted later if indications are that the analyzer is causing degradations. \\ \\ 2. Configure the hardware according to the hardware set-up instructions given in the Hardware Setup section above. Set the frequency of the DAC clock signal generator to 1400MHz, and the output level to 6dBm. The spectrum analyzer can be configured with Center Frequency = 2050 MHz, Span = 200 MHz, and Resolution Bandwidth of 30 kHz. Choose Input Attenuation to be 24dB. This can be adjusted later if indications are that the analyzer is causing degradations. \\ \\
 3. Follow the sequence below to configure the AD9142A using ACE. \\ \\  3. Follow the sequence below to configure the AD9142A using ACE. \\ \\ 
-a. Click //Modify// on the left under //Initial Configuration Summary// in the same tab as the board block diagram. Copy the information from the image below, and click //Apply//. \\ \\+a. Click "Modify" on the left under "Initial Configuration Summary" in the same tab as the board block diagram. Copy the information from Figure 5, and click "Apply." \\ \\
  
 <WRAP column 40%> <WRAP column 40%>
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 </WRAP> </WRAP>
 <WRAP column 40%> <WRAP column 40%>
-<WRAP centeralign> Initial Configuration Summary </WRAP>+<WRAP centeralign> Figure 5.  Initial Configuration Summary </WRAP>
 </WRAP> </WRAP>
 <WRAP column 55%> <WRAP column 55%>
-<WRAP centeralign> Board block diagram of the AD9124A </WRAP>+<WRAP centeralign> Figure 6.  Board block diagram of the AD9124A </WRAP>
 </WRAP> </WRAP>
 <WRAP clear> <WRAP clear>
 </WRAP> </WRAP>
  
-b. Double click on the AD9142A component on the board diagram. This brings up the chip diagram. Set all the settings to match those in the chip diagram below, and click //Apply Changes//. Click //Read All// on the upper left of the page if the DLL is not enabled, as indicated by the green light next to //DLL Lock//. See the ACE Software Features section for more information about changing parameters. \\ \\+b. Double click on the AD9142A component on the board diagram. This brings up the chip diagram. Set all the settings to match those in the chip diagram below, and click "Apply Changes." Click "Read All" on the upper left of the page if the DLL is not enabled, as indicated by the green light next to "DLL Lock." See the ACE Software Features section for more information about changing parameters. \\ \\
  
 {{ :resources:eval:user-guides:ad9142a_chipview.png }} {{ :resources:eval:user-guides:ad9142a_chipview.png }}
 <WRAP clear> <WRAP clear>
 </WRAP> </WRAP>
-<WRAP centeralign> Chip block diagram of the AD9142A </WRAP>+<WRAP centeralign> Figure 7.  Chip block diagram of the AD9142A </WRAP>
  
-c. Open DPGDownloader. (Start > All Programs > Analog Devices > DPG > DPGDownloader). Ensure that the program detects the AD9142A, as indicated in the //Evaluation Board// drop-down list. For this evaluation board, LVDS is the only valid Port Configuration, and should be selected automatically. If not, select it in the //Port Configuration// drop-down list. The //DCO Frequency// window should show the correct data rate (350 MHz). The actual detected frequency may not be exactly 350 MHz but it should be stable and very close to it as shown in the figure below.  \\ \\+c. Open DPGDownloader. (Start > All Programs > Analog Devices > DPG > DPGDownloader). Ensure that the program detects the AD9142A, as indicated in the "Evaluation Board" drop-down list. For this evaluation board, LVDS is the only valid Port Configuration, and should be selected automatically. If not, select it in the "Port Configuration" drop-down list. The "DCO Frequency" window should show the correct data rate (350 MHz). The actual detected frequency may not be exactly 350 MHz but it should be stable and very close to it as shown in the Figure 8.  \\ \\
  
 {{ :resources:eval:user-guides:ad9142a_dpgd.png }} {{ :resources:eval:user-guides:ad9142a_dpgd.png }}
 +<WRAP clear>
 +</WRAP>
 +<WRAP centeralign> Figure 8. </WRAP>
  
-d. Click on //Add Generated Waveform//, and then //Single Tone//. A Single Tone panel will be added to the vector list. Enter the sample rate, in this case 350 MHz and the desired frequency, 50MHz. Enter the digital amplitude. In this case, use -14dBFS. Check the //Generate Complex Data (I & Q)// box and uncheck the //Unsigned Data// box. Select the In-Phase data vector in the //I Data Vector// drop down menu and the Quadrature data vector in the //Q Data Vector//. This should match the image above. \\ \\+d. Click on "Add Generated Waveform," and then "Single Tone." A Single Tone panel will be added to the vector list. Enter the sample rate, in this case 350 MHz and the desired frequency, 50MHz. Enter the digital amplitude. In this case, use -14dBFS. Check the "Generate Complex Data (I & Q)" box and uncheck the "Unsigned Data" box. Select the In-Phase data vector in the "I Data Vector" drop down menu and the Quadrature data vector in the "Q Data Vector." This should match the image above. \\ \\
 e. Click Download ({{:resources:eval:dpg:image009.png?direct&|}}) and Play ({{:resources:eval:dpg:image010.png?direct&|}}). \\ \\ e. Click Download ({{:resources:eval:dpg:image009.png?direct&|}}) and Play ({{:resources:eval:dpg:image010.png?direct&|}}). \\ \\
 4. The current on the 5V supply should read about 1310mA. \\ 4. The current on the 5V supply should read about 1310mA. \\
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 <WRAP center> <WRAP center>
 |  {{ :resources:eval:dpg:ad9142:ad9142a-5372_output.png?600 |}}  | |  {{ :resources:eval:dpg:ad9142:ad9142a-5372_output.png?600 |}}  |
-|  Figure 7 AD9142A-M5372 Eval Board output Spectrum  |+|  Figure 9.  AD9142A-M5372 Eval Board output Spectrum  |
 </WRAP> </WRAP>
 ==== SPI Software ==== ==== SPI Software ====
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 |  {{:resources:eval:dpg:ad9142:ad9142a-5372_spi_software_entry_screen.png?600|}}  | |  {{:resources:eval:dpg:ad9142:ad9142a-5372_spi_software_entry_screen.png?600|}}  |
-|  Figure 3 Entry Screen of the AD9142A SPI software  |+|  Figure 10.  Entry Screen of the AD9142A SPI software  |
 </WRAP> </WRAP>
  
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 d. There may be a few registers highlighted in red. The red highlights mean mismatches between the SPI read and write values in the software. Clicking “Read All Registers” reads back all the current values in the registers, which should resolve the highlights. \\ \\ d. There may be a few registers highlighted in red. The red highlights mean mismatches between the SPI read and write values in the software. Clicking “Read All Registers” reads back all the current values in the registers, which should resolve the highlights. \\ \\
 e. Toggle register “FIFO SPI RESET REQUEST”. The FIFO level readback registers (INTEGRAL and FRACTIOANAL) should now match the FIFO level request registers. \\ \\ e. Toggle register “FIFO SPI RESET REQUEST”. The FIFO level readback registers (INTEGRAL and FRACTIOANAL) should now match the FIFO level request registers. \\ \\
-f. Open DPG Downloader if you have not done so. (Start > All Programs > Analog Devices > DPG > DPGDownloader). Ensure that the program detects the AD9142A, as indicated in the “Evaluation Board” drop-down list, and select it. For this evaluation board, LVDS is the only valid Port Configuration, and it will be selected automatically. The “DCO Frequency” window should show the correct data rate (350 MHz). The actual detected frequency may not be exactly 350 MHz but it should be stable and very close to it as shown in Figure 4. \\ \\+f. Open DPG Downloader if you have not done so. (Start > All Programs > Analog Devices > DPG > DPGDownloader). Ensure that the program detects the AD9142A, as indicated in the “Evaluation Board” drop-down list, and select it. For this evaluation board, LVDS is the only valid Port Configuration, and it will be selected automatically. The “DCO Frequency” window should show the correct data rate (350 MHz). The actual detected frequency may not be exactly 350 MHz but it should be stable and very close to it as shown in Figure 11. \\ \\
 <WRAP center> <WRAP center>
  
 |  {{ :resources:eval:dpg:ad9142:ad9142a_dpg_downloader_entry_screen.png?600 |}}  | |  {{ :resources:eval:dpg:ad9142:ad9142a_dpg_downloader_entry_screen.png?600 |}}  |
-|  Figure 4 DPG Downloader Panel  |+|  Figure 11.  DPG Downloader Panel  |
 </WRAP> </WRAP>
  
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 |  {{ :resources:eval:dpg:ad9142:ad9142a_dpg_downloader_sinewave.png?600 |}}  | |  {{ :resources:eval:dpg:ad9142:ad9142a_dpg_downloader_sinewave.png?600 |}}  |
-|  Figure 5 DPG Downloader sinewave vector  |+|  Figure 12.  DPG Downloader sinewave vector  |
 </WRAP> </WRAP>
  
 h. Click Download ({{:resources:eval:dpg:image009.png?direct&|}}) and Play ({{:resources:eval:dpg:image010.png?direct&|}}). \\ \\ h. Click Download ({{:resources:eval:dpg:image009.png?direct&|}}) and Play ({{:resources:eval:dpg:image010.png?direct&|}}). \\ \\
-i. Go back to the AD9142A SPI software and toggle the “FIFO SPI RESET REQUEST” button (from 0 to 1 and back to 0) to reset the FIFO. The FIFO level readback registers (INTEGRAL and FRACTIOANAL) should now match the FIFO level request registers. The AD9142A SPI software and the spectrum analyzer should look like Figure 6 and Figure 7 respectively. \\ \\+i. Go back to the AD9142A SPI software and toggle the “FIFO SPI RESET REQUEST” button (from 0 to 1 and back to 0) to reset the FIFO. The FIFO level readback registers (INTEGRAL and FRACTIOANAL) should now match the FIFO level request registers. The AD9142A SPI software and the spectrum analyzer should look like Figure 13 and Figure 14 respectively. \\ \\
  
 <WRAP center> <WRAP center>
  
 |  {{ :resources:eval:dpg:ad9142:ad9142a-5372_spi_software_entry_screen.png?600 |}}  | |  {{ :resources:eval:dpg:ad9142:ad9142a-5372_spi_software_entry_screen.png?600 |}}  |
-|  Figure 6 Configured Quick Start Tab of the AD9142A SPI software  |+|  Figure 13.  Configured Quick Start Tab of the AD9142A SPI software  |
 </WRAP> </WRAP>
  
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 <WRAP center> <WRAP center>
 |  {{ :resources:eval:dpg:ad9142:ad9142a-5372_output.png?600 |}}  | |  {{ :resources:eval:dpg:ad9142:ad9142a-5372_output.png?600 |}}  |
-|  Figure 7 AD9142A-M5372 Eval Board output Spectrum  |+|  Figure 14.  AD9142A-M5372 Eval Board output Spectrum  |
 </WRAP> </WRAP>
 ===== SPI SOFTWARE ===== ===== SPI SOFTWARE =====
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 <WRAP center> <WRAP center>
 |  {{ :resources:eval:dpg:ad9142:ad9142_spi_software_quick_start_config.png?600 |}}  | |  {{ :resources:eval:dpg:ad9142:ad9142_spi_software_quick_start_config.png?600 |}}  |
-|  Figure 8 AD9142A SPI Quick Start tab  |+|  Figure 15.  AD9142A SPI Quick Start tab  |
 </WRAP> </WRAP>
 ==== PLL ==== ==== PLL ====
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 <WRAP center> <WRAP center>
 |  {{ :resources:eval:dpg:ad9142:ad9142_spi_software_pll.png?600 |}}  | |  {{ :resources:eval:dpg:ad9142:ad9142_spi_software_pll.png?600 |}}  |
-|  Figure 9 AD9142A SPI PLL Tab  |+|  Figure 16.  AD9142A SPI PLL Tab  |
 </WRAP> </WRAP>
 ===== EVB Jumper Configurations ===== ===== EVB Jumper Configurations =====
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 <WRAP clear> <WRAP clear>
 </WRAP> </WRAP>
-<WRAP centeralign> NCO settings for the AD9122 </WRAP>+<WRAP centeralign> Figure 17.  NCO settings for the AD9122 </WRAP>
  
 In addition, some parameters can be enabled or disabled. This feature is evident by the color of the block parameter. For example, if the block parameter is dark blue, the parameter is enabled. If it is light grey, it is disabled. To enable or disable a parameter, click on it.  In addition, some parameters can be enabled or disabled. This feature is evident by the color of the block parameter. For example, if the block parameter is dark blue, the parameter is enabled. If it is light grey, it is disabled. To enable or disable a parameter, click on it. 
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 </WRAP> </WRAP>
 <WRAP column 40%> <WRAP column 40%>
-<WRAP centeralign> Enabled parameter </WRAP>+<WRAP centeralign> Figure 18.  Enabled parameter </WRAP>
 </WRAP> </WRAP>
 <WRAP column 55%> <WRAP column 55%>
-<WRAP centeralign> Disabled parameter </WRAP>+<WRAP centeralign> Figure 19.  Disabled parameter </WRAP>
 </WRAP> </WRAP>
 <WRAP clear> <WRAP clear>
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 <WRAP clear> <WRAP clear>
 </WRAP> </WRAP>
-<WRAP centeralign> Bench Set-Up </WRAP>+<WRAP centeralign> Figure 20.  Bench Set-Up </WRAP>
  
 ACE also contains the Macro Tool, which can be used to record register reads and writes. This is executed in the memory map view or with the initialization wizard. To use, check the “Record Sub-Commands” checkbox and press the record button. Changes in the memory map, which are bolded until they are applied to the part, are recorded as UI commands by the macro tool once the changes are made. Changed register write commands for the controls are also recorded. Hit “Apply Changes” to execute the commands and make changes in the memory map. To stop recording, click the “Stop Recording” button. A macro tool page with the command steps will be created. The macro can be saved using the “Save Macro” button so that it may be loaded for future use.  ACE also contains the Macro Tool, which can be used to record register reads and writes. This is executed in the memory map view or with the initialization wizard. To use, check the “Record Sub-Commands” checkbox and press the record button. Changes in the memory map, which are bolded until they are applied to the part, are recorded as UI commands by the macro tool once the changes are made. Changed register write commands for the controls are also recorded. Hit “Apply Changes” to execute the commands and make changes in the memory map. To stop recording, click the “Stop Recording” button. A macro tool page with the command steps will be created. The macro can be saved using the “Save Macro” button so that it may be loaded for future use. 
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 <WRAP clear> <WRAP clear>
 </WRAP> </WRAP>
-<WRAP centeralign> Macro tool in ACE. The //Stop Recording//, //Record//, and //Save Macro// commands are located at the top of the macro tool. </WRAP>+<WRAP centeralign> Figure 21.  Macro tool in ACE. The //Stop Recording//, //Record//, and //Save Macro// commands are located at the top of the macro tool. </WRAP>
  
 The raw macro file will be saved using ACE syntax, which is not easily readable. To remedy this, the ACE software download includes the Macro to Hex Conversion Tool. The user can choose to include or exclude register write, reads, and/or comments in the conversion. The file pathways for the source and save paths should be the same, except that one should be an .acemacro file and the other should be a .txt file. The “Convert” button converts and opens the converted text file, which is easier to read. The conversion tool can also convert back to an .acemacro file if desired.  The raw macro file will be saved using ACE syntax, which is not easily readable. To remedy this, the ACE software download includes the Macro to Hex Conversion Tool. The user can choose to include or exclude register write, reads, and/or comments in the conversion. The file pathways for the source and save paths should be the same, except that one should be an .acemacro file and the other should be a .txt file. The “Convert” button converts and opens the converted text file, which is easier to read. The conversion tool can also convert back to an .acemacro file if desired. 
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 </WRAP> </WRAP>
 <WRAP column 40%> <WRAP column 40%>
-<WRAP centeralign> Conversion set-up for macro to hex </WRAP>+<WRAP centeralign> Figure 22.  Conversion set-up for macro to hex </WRAP>
 </WRAP> </WRAP>
 <WRAP column 55%> <WRAP column 55%>
-<WRAP centeralign> Converted text file </WRAP>+<WRAP centeralign> Figure 23.  Converted text file </WRAP>
 </WRAP> </WRAP>
 <WRAP clear> <WRAP clear>
resources/eval/dpg/ad9142a-m5372-ebz.txt · Last modified: 16 Jun 2017 16:02 by Bailey Meyer

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