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resources:eval:dpg:ace_ad9136-ebz [18 Mar 2016 21:19] – [AD9136/AD9135 Evaluation Software] Michele Viani | resources:eval:dpg:ace_ad9136-ebz [18 Mar 2016 22:49] – [Single-Tone Test] Michele Viani | ||
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=== Configure DPG Vector Software | === Configure DPG Vector Software | ||
1. To begin, turn on the external +5V supply. \\ \\ | 1. To begin, turn on the external +5V supply. \\ \\ | ||
- | 2. Open DPG Downloader if you have not done so. (Start > All Programs > Analog Devices > DPG > DPGDownloader). Ensure that the program detects the AD9136/ | + | 2. Open DPG Downloader if you have not done so. (Start > All Programs > Analog Devices > DPG > DPGDownloader). Ensure that the program detects the AD9136/ |
+ | <WRAP center> | ||
+ | | {{ {{ : | ||
+ | | Figure 3. Initial DPGDownloader Panel | | ||
+ | </ | ||
+ | 3. Select "QBF 2X4 85G 425M" from the "Port Configuration" | ||
3. Click on “Add Generated Waveform”, | 3. Click on “Add Generated Waveform”, | ||
- | 4. Select the WIFR vector (I) in the “DAC0” drop down menu and the WIFR vector (Q) in the “DAC1”. At this point, the DPG Downloader panel should look like Figure | + | 4. Select the WIFR vector (I) in the “DAC0” drop down menu and the WIFR vector (Q) in the “DAC1”. At this point, the DPG Downloader panel should look like Figure |
<WRAP center> | <WRAP center> | ||
- | | {{ {{ : | + | | {{ {{ : |
- | | Figure | + | | Figure |
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=== Configuring SPI === | === Configuring SPI === | ||
- | 1. Open the AD9136/ | + | 1. Open ACE (Start > All Programs > Analog Devices > ACE). It should recognize the AD9136-EBZ or AD9135-EBZ in the attached hardware section when the application startup |
<WRAP center> | <WRAP center> | ||
- | + | | {{ {{ : | |
- | | {{ {{ : | + | | Figure |
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- | | Figure | + | |
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2. Configure the hardware according to the hardware set-up instructions given in the Hardware Setup section above. Set the frequency of the DAC clock signal generator to 1.6GHz, and the output level to 3dBm. The spectrum analyzer can be configured with Start Frequency = 1 MHz, Stop Frequency | 2. Configure the hardware according to the hardware set-up instructions given in the Hardware Setup section above. Set the frequency of the DAC clock signal generator to 1.6GHz, and the output level to 3dBm. The spectrum analyzer can be configured with Start Frequency = 1 MHz, Stop Frequency | ||
- | 3. Follow the sequence below to configure the AD9136/ | + | 3. Follow the sequence below to configure the AD9136-EBZ/AD9135-EBZ Setup Wizard settings. \\ \\ |
- | a. The Links should be set to dual link. The JESD Mode is set to 8, Subclass 1 box checked, Interpolation set to 1, and FDAC set to 1.6GHz. | + | a. The Links should be set to dual link. The JESD Mode is set to 8, Interpolation set to 1, and FDAC set to 1.6GHz, as shown in Figure 6. |
- | b. At this point the Serial Line Rate in the DPG3 software panel should read 8Gbps.\\ \\ | + | |
+ | b. Hit “Apply” and the wizard will execute a startup routine | ||
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- | | {{ {{ : | + | | {{ {{ : |
- | | Figure | + | | Figure 6. Configured ACE Wizard GUI for the AD9136-EBZ |
+ | |||
+ | | {{ {{ : | ||
+ | | Figure | ||
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- | d. Click Download ({{: | + | 4. Return to DPGDownloader and note the Serial Line Rate readback should read 8Gbps indicating that the clocks going to the FPGA are configured properly for this setup, as shown in Figure 8. |
+ | |||
+ | 5. Click Download ({{: | ||
+ | |||
+ | <WRAP center> | ||
+ | | {{ {{ : | ||
+ | | Figure 8. Executed DPGDownloader GUI for the AD9136-EBZ | ||
+ | </ | ||
- | e. The current on the 5V supply should read about 1430mA. If you do not see the output, gently push the board toward the DPG3. This ensures that the board is firmly connected to the DPG3. The four registers codeGrpSync, FrameSync, GoodCheckSum | + | The current on the 5V supply should read about 1430mA. If you do not see the output, gently push the board toward the DPG3. This ensures that the board is firmly connected to the DPG3. The four register readbacks on the board view for Code Group Sync, Frame Sync, Good CheckSum |
- | 3. The output spectrum of the DAC should look like Figure | + | 6. The output spectrum of the DAC should look like Figure |
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- | | {{ {{ : | + | | {{ {{ : |
- | | Figure | + | | Figure |
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