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— | resources:eval:developer-kits:2to24ghz-mxfe-rf-front-end:lo-generation [24 Jan 2023 20:04] – Added block diagrams for fixed and tunable LO, removed sharepoint links, added instructions for requesting files Brad Hall |
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| ======LO Generation Options====== |
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| The 2-24GHz RF Front End has two different sets of LO specifications and requirements- one for the fixed LO sources and a second for the wideband, tunable LOs. Additionally, LO performance requirements vary widely across the instrumentation, communications, and aerospace & defense application space, so while a one-size-fits-all solution for the LO generation circuitry may not be practical, Analog Devices offers numerous, flexible options for wideband frequency synthesizers. |
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| =====Fixed LO Source===== |
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| The 18GHz, fixed LO source can be supplied any integrated PLL/VCO such as the [[adi>ADF4371]], or a discrete LO implementation using ADI PLLs and quad-band VCOs for applications requiring lower phase noise. The frequency synthesizer circuit detailed in CN0568 (shown below), provides one possible solution for a discrete LO implementation using the [[adi>ADF41513]] PLL and [[adi>HMC8362]] quad-band VCO. |
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| {{ :resources:eval:developer-kits:cn0568synthesizerdiagram.png?600 |}} |
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| More information on the CN0568 frequency synthesizer can be found here: [[adi>en/design-center/reference-designs/circuits-from-the-lab/cn0568.html#rd-overview]] |
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| This circuit was adapted to provide a cleaner output tone (reduced spurs) and a higher output power with the below block diagram: |
| {{:resources:eval:developer-kits:2to24ghz-mxfe-rf-front-end:fixed_lo_block_diagram.png|}} |
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| For this design, we have chosen a discrete LO implementation using the ADF41513 and the HMC8362 to achieve lower phase noise and power consumption. A simulation file created in ADI SimPLL can be requested with instructions provided at the bottom of this page. |
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| =====Tunable LO Source===== |
| The tunable LO synthesizer has a more complex set of requirements, many of which directly impact the system-level functionality of the signal chain, such as tuning speed and frequency coverage. The wideband frequency synthesizer circuit shown in the figure below uses the [[adi>ADF4371]] integrated PLL/VCO and is one potential option for the tunable LO source, enabling low phase-noise tuning across the RF signal chain’s full operating range. The tunable filtering on the [[adi>ADF4371]] outputs is optional and dependent on the LO spurious requirements of the end system. The SPDT switch selects between the two [[adi>ADF4371]] outputs and the [[adi>HMC383]] driver amp ensure sufficient LO drive level at the mixer for optimal performance. |
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| {{:resources:eval:developer-kits:2to24ghz-mxfe-rf-front-end:tunable_lo_block_diagram.png|}} |
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| Simulation files have been created for these circuits within ADI SimPLL Version 5.60.05. Two files can be provided. The first one is for the 11.5-16 GHz output, and the second one is for the 16-28 GHz output. Using them, one can simulate phase noise/jitter, lock times, and spurs for the appropriate LO output. |
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| <WRAP round 50% download> To request the SimPLL files that simulation the performance of these circuits, please send a request [[https://support.analog.com/en-US/technical-support/create-case-techsupport/ | here]] and include the following info: |
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| * Name |
| * Job Title |
| * Company Name |
| * Company Location |
| * Application/Use Case |
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| </WRAP> |
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