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AD9574 Evaluation Board User Guide

Evaluation Board Features

Simple power connection using 6 V wall adapter and on-board voltage regulators
- Regulator easily bypassed for power measurements
12 ac-coupled SMA connectors for outputs
SMA input connectors for
- 2 single-ended reference clock inputs
- Reference monitor clock input
Prepopulated 25MHz CMOS XOs for asynchronous operation
On-board jumpers for easy configuration of pin programmable functions
Status LEDs for diagnostic signals
Easy access to digital I/O and diagnostic signals via 12 pin header

Equipment Needed

Reference oscillator or signal generator (optional)
Other evaluation board to be clocked or test equipment
- Oscilloscope, spectrum analyzer, phase noise analyzer
SMA cables (50 Ω)
6 V wall supply (provided)
USB cable (provided)

Online Resources

Documents Needed

AD9574 data sheet

General Description

The AD9574 evaluation board is a compact, easy-to-use platform for evaluating all features of the AD9574. The AD9574 provides a multiple output clock generator function compromising of a dedicated PLL core optimized for Ethernet and gigabit line card applications. Configuring the AD9574 for a particular application requires only the connection of external pull-up or pull-down resistors to the appropriate pin program reader pins (PPRx). These pins provide control of the internal dividers for establishing the desired frequency translations, clock output functionality, and input reference functionality. Connecting an external 19.44 MHz or 25 MHz oscillator to one or both of the REF0_P/REF0_N or REF1_P/REF1_N reference inputs results in a set of output frequencies prescribed by the PPRx pins. Connecting a stable clock source (8 kHz/10 MHz/19.44 MHz/25 MHz/38.88 MHz) to the monitor clock input enables the optional monitor circuit providing quality of service (QoS) status for REF0 or REF1.

Figure 1. AD9574/PCBZ

Evaluation Board Hardware

The following instructions are for setting up the physical connections to the AD9574/PCBZ evaluation board.

Power Connections

Connect the included 6V wall supply to P500 to power all of the necessary on board components. Ensure the P501 jumper is connected between pins 1 and 2 and P502 is connected between pins 1 and 2. Alternatively, the user may remove the jumper at P502 and connect an external 3.3V supply to pin 2.

Signal Connections

Reference Inputs (REFx)

The AD9574/PCBZ allows for the reference inputs to be clocked by one of two crystal oscillators (XO) at Y202 and Y204 or via single ended SMA connectors J215 and J217. The default signal path is to use 25MHz CMOS XOs for both REF0_P and REF1_P.

The following board modifications from the default BOM are required to use the SMA reference input connectors to supply a differential reference instead of the 25MHz XOs:

Remove R217, R218, R224, and R225
Place C221, C222, C226, and C227

The following board modifications from the default BOM are required to use the SMA reference input connectors to supply an external single ended CMOS reference input instead of the 25MHz XOs: - Remove R214, R217, R218, R221, R224, R225, T201 and T202 - Place R212, R219, C221 and C222 with 0Ω resistors.

Monitor Clock Input (MCLK_x)

The AD9574/PCBZ provides a signal path to the MCLK_x inputs using SMA connector J216. The default BOM configuration allows for a 3.3V single ended CMOS signal to be applied to SMA connector J216 with the monitor clock input set to differential using the PPR6 biasing jumpers.
The following board modifications from the default BOM are required to use a single ended 3.3V CMOS signal with the monitor clock set to a single ended receiver:

Replace C231 0Ω resistor.

The following board modifications from the default BOM are required to convert a single ended signal to differential with the monitor clock receiver set to a differential receiver:

Remove R226 and R226
Place balun T203

Pin Programming and Jumper Settings

The AD9574/PCBZ contains jumpers to bias the following pins on the AD9574:

PPRx
REF_SEL
REFMON

The following subsections describe the various configuration options for these pins.

PPRx

The AD9574 makes use of seven PPRx pins to configure the device. Internal circuitry scans the PPRx pins for the presence of resistor terminations and configures the device accordingly. The array of jumper headers near the bottom of the evaluation board allow for easy configuration of the 7 PPR pin terminations. A PPRx pin scan occurs automatically as part of the power-on reset sequence or following assertion of the RESET pin. Each PPRx pin controls a specific function or functional block within the device as defined in Table 1.
Table 1. PPRx Pin Function and Jumper Assignments

Mnemonic	Assigned Evaluation Board Jumpers	Function Assignment
PPR0	P402-P404	Reference input configuration
PPR1	P406-P408	Frequency translation settings
PPR2	P410-P412	OUT0_x and OUT1_x configurations
PPR3	P414-P416	OUT4_x and OUT5_x configurations
PPR4	P418-P420	OUT6_x configuration
PPR5	P422-P424	Reference frequency monitor error threshold
PPR6	P426-P428	Monitor clock (MCLK) input configuration

Each set of 3 jumpers allows for the user to configure various PPRx pins to one of 8 states. These states are defined in Table 2.

Table 2. PPRx States

State	Resistance	Terminus
0	820Ω	GND
1	1.8kΩ	GND
2	3.9kΩ	GND
3	8.2kΩ	GND
4	820Ω	VDD
5	1.8kΩ	VDD
6	3.9kΩ	VDD
7	8.2kΩ	VDD

There are three headers, each 3 pins wide, to select the 8 states listed in Table 2. Figure 2 shows a layout capture of the available jumpers for a single PPRx pin. Figure 3 shows an example configuration to set PPR0 to state 0.

Figure 2. PPRx Jumper Configuration

Figure 3. Example Configuration for State 0

Note that only two jumpers are needed to correctly terminate each PPRx pin; one to set the resistance value and one to terminate the resistance to VCC or GND. Please refer to the AD9574 datasheet or page 3 of the evaluation board schematic for more information about the available settings for each PPRx pin.

REF_SEL and REFMON

The REF_SEL and REFMON pins are tied low or high via jumpers P101 and P102 respectively. Table 3 shows the functions of these pins.

Table 3. REF_SEL and REFMON Settings

Pin Name	Jumper	Connected to GND	Connected to VCC
REF_SEL	P101	REF0	REF1
REFMON	P102	Reference monitor disable	Reference monitor enable

Quick Start Guide

The quick start section covers simple PLL operation to lock the AD9574 PLL and output two high speed sample clocks and two SYSREF signals. See the AD9528 data sheet and Evaluation Software Components section for a detailed explanation of the various AD9528 features.

Table 2 describes a summary of one possible operating mode of the AD9528 which is setup used for this quick start guide.

Table 2. Quick Start Summary

Parameter	Value
Input Frequency and Logic Type	25MHz, 3.3V CMOS
OUT0 Frequency and Logic Type	156.25MHz CMOS
OUT0 Frequency and Logic Type	156.25MHz CMOS
OUT0 Frequency and Logic Type	156.25MHz CMOS
OUT0 Frequency and Logic Type	156.25MHz CMOS
PLL1 Phase Detector Frequency	30.72MHz
PLL1 External VCXO Frequency	122.88MHz
PLL1 Feedback Divider (N Divider)	4
PLL2 Phase Detector Frequency	122.88MHz
PLL2 VCO Frequency	3686.4MHz
PLL2 Feedback Divider (N Divider)	10
PLL2 VCO Divider (M Divider)	3
Output Divider	10 on OUT0 and 5 on OUT10

Use the following steps to configure and lock both AD9528 PLLs by loading a premade setup file.

Apply a 0dBm 122.88MHz signal to SMA connector J27 (REFA_P).
Download the AD9528 Quick Start Setup File found online on the AD9528 Evaluation Board Page.
Once downloaded, the setup file can be loaded into the evaluation board by opening the AD9528 Evaluation Software, click File> Load Setup, and select the appropriate .stp file.
A prompt will display that the settings from the setup file have been loaded into the AD9528. A VCO calibration is needed to lock the output PLL to the new AD9528 settings. Press Yes to perform a VCO calibration and output synchronization.

Figure 4. VCO Calibration and Output Synchronization Prompt
The “LD” indicator for both PLL1 and PLL2 should illuminate green on the main window to signify that both PLLs are locked.
Issue a 4 Pulse N-Shot SYSREF:
1. Press the SYSREF REGISTERS button in the GUI main window
2. Check SPI Sysref Request
3. Press Load

This section of the user’s guide provides the basic information needed to [simply observe] enable AD9574 operation in the default configuration. More detailed instructions on use of all the available features of the AD9574 PCBZ evaluation board can be found [on subsequent] pages. The AD9574 is pin programmable, so no external software or PC connections are required. Table x shows the default configuration as shipped Plug the supplied power block into a wall socket that complies with the input specifications given on the power block. Plug the round connector at the end of the wire from the power block into P500, the 6V input of the AD9574 PCBZ evaluation board. As long as all jumpers have remained in their default positions, the AD9574 should now be operational. A red LED on the left side of the board, just below the round electrolytic capacitors, should now be illuminated, indicating that the AD9574 is now in a locked condition.

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Table of Contents

AD9574 Evaluation Board User Guide

Evaluation Board Features

Equipment Needed

Online Resources

General Description