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products:audio-video:analoghdmidvi-interfaces:adv8005:app-notes:picture-in-picture-on-4k30 [10 Mar 2016 22:21] – [DDR2 chip options] David Dashefsky | products:audio-video:analoghdmidvi-interfaces:adv8005:app-notes:picture-in-picture-on-4k30 [03 Feb 2021 22:25] (current) – David Dashefsky | ||
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+ | [[products: | ||
====== Picture in Picture overlay on up to 4k30 ====== | ====== Picture in Picture overlay on up to 4k30 ====== | ||
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====== Reference parts ====== | ====== Reference parts ====== | ||
- | [[http:// | + | [[adi>adv8005| ADV8005 - NatureVue™ Video Signal Processor with Bitmap OSD, Dual HDMI Tx, and Encoder]] |
====== Application summary ====== | ====== Application summary ====== | ||
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- | ===== External | + | ===== External OSD menu ===== |
If you already have an SOC generating your OSD, the ADV8005 can display your menu either overlaid on main video, or in full screen, or even blended with the internal OSD engine. | If you already have an SOC generating your OSD, the ADV8005 can display your menu either overlaid on main video, or in full screen, or even blended with the internal OSD engine. | ||
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b. The second option which requires a bit more hardware is to send the external SOD alpha channel through TTL pins which basically is like a color channel of your video but it is routed to the OSD blend block in order to apply fine alpha blend one pixel at a time. This would allow to create per pixel alpha blending of the external OSD menu with either main video or internal OSD or even both. | b. The second option which requires a bit more hardware is to send the external SOD alpha channel through TTL pins which basically is like a color channel of your video but it is routed to the OSD blend block in order to apply fine alpha blend one pixel at a time. This would allow to create per pixel alpha blending of the external OSD menu with either main video or internal OSD or even both. | ||
+ | ===== Streaming preview video from SPI ===== | ||
+ | The link to DDR2 memory through SPI can be used to load video frames for a small preview of video or live streaming. While video frame rate, quality and size will be limited by SPI speed and available DDR2 DMA speed in ADV8005, small lower quality preview window can be displayed. | ||
+ | |||
+ | ===== Multiple PIP using external OSD ===== | ||
+ | If using an SOC to generate external video, multiple preview video can be tiled int one video which is sent to the external OSD TTL and the ADV8005 internal OSD can partition each tile into PIP sub-windows at different location. This could achieve even live streaming preview as seen on smart TVs. | ||
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The ADV8005 can downscale 1 4k30 video input to 1080p by using the HPS and SVSP. | The ADV8005 can downscale 1 4k30 video input to 1080p by using the HPS and SVSP. | ||
- | ===== POP ===== | + | ===== Picture out of Picture (POP) ===== |
POP uses a feature of the PVSP called album mode which can downscale the input video within the input resolution video. Only the PVSP can do album mode. Usually only main video needs POP while all other videos will be pip within the main video resolution. | POP uses a feature of the PVSP called album mode which can downscale the input video within the input resolution video. Only the PVSP can do album mode. Usually only main video needs POP while all other videos will be pip within the main video resolution. | ||
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The OSD bandwidth varies as per each region size which is better calculated using Blimp’s emulator. Bandwidth maximum is calculated per video line. Of course overlapping regions can double the bandwidth for a video line. | The OSD bandwidth varies as per each region size which is better calculated using Blimp’s emulator. Bandwidth maximum is calculated per video line. Of course overlapping regions can double the bandwidth for a video line. | ||
- | To get Blimp OSD designer tool, go to [[https:// | + | |
==== External OSD ==== | ==== External OSD ==== | ||
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====== DDR2 chip options ====== | ====== DDR2 chip options ====== | ||
- | When the bandwidth requirement and size for the ADV8005 are below 7.45 gpbs, only one DDR2 chip can be used. This might be specially | + | When the bandwidth requirement and size for the ADV8005 are below 7.45 gpbs, only one DDR2 chip can be used. This might be especially |
====== Application analysis ====== | ====== Application analysis ====== | ||
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- | This table assumes PVSP is only used for upscaling with no RNR or interlaced conversion. If any of these features are required, some configuration | + | This table assumes PVSP is only used for upscaling with no RNR or interlaced conversion. If any of these features are required, some configurations |
- | In the only case above that requires 2 ADV8005, because both inputs need to be downscaled to 1080p, it would need 2 ADV8005. However, note that the ADV8005 doing only downscaling from 4k30 to 1080p would be able to have only one DDR2 memory chip. | + | In the only case above that requires 2 ADV8005, because both inputs need to be downscaled to 1080p, it would need 2 ADV8005. However, note that the ADV8005 doing only downscaling from 4k30 to 1080p would need only one DDR2 memory chip. |
====== Glossary ====== | ====== Glossary ====== | ||
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Gbps: gigabits per second | Gbps: gigabits per second | ||
- |