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products:audio-video:analoghdmidvi-interfaces:adv8005:app-notes:picture-in-picture-on-4k30 [10 Mar 2016 21:26] – created Dominic Bernique | products:audio-video:analoghdmidvi-interfaces:adv8005:app-notes:picture-in-picture-on-4k30 [03 Feb 2021 22:25] (current) – David Dashefsky | ||
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- | Picture in Picture overlay on up to 4k30 | + | [[products: |
+ | ====== | ||
====== Overview ====== | ====== Overview ====== | ||
- | Picture in picture on home AVR, TVs and pro audio still remains a popular trend but its availability is possibly overlooked by customer and maybe omitted by supplier due to higher hardware costs in a market driven by low cost devise | + | Picture in picture on home AVR, TVs and pro audio still remains a popular trend but its availability is possibly overlooked by customer and maybe omitted by supplier due to higher hardware costs in a market driven by low cost devices |
Nevertheless, | Nevertheless, | ||
- | The ADV8005 | + | The ADV8005 |
- | Note that the ADV8003 does not support 4k30 downscaling | + | |
+ | |||
+ | ====== Reference parts ====== | ||
+ | [[adi> | ||
====== Application summary ====== | ====== Application summary ====== | ||
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- | ===== External | + | ===== External OSD menu ===== |
If you already have an SOC generating your OSD, the ADV8005 can display your menu either overlaid on main video, or in full screen, or even blended with the internal OSD engine. | If you already have an SOC generating your OSD, the ADV8005 can display your menu either overlaid on main video, or in full screen, or even blended with the internal OSD engine. | ||
- | a. By suing the OSD blend, an transparent color can be used for color keying where any pixel set to this color from the external OSD input will appear as transparent at the output. This is the easiest case of using color keying where edges are transparent or not with no per pixel alpha smoothing around edges. | + | a. By using the OSD blend, an transparent color can be used for color keying where any pixel set to this color from the external OSD input will appear as transparent at the output. This is the easiest case of using color keying where edges are transparent or not with no per pixel alpha smoothing around edges. |
b. The second option which requires a bit more hardware is to send the external SOD alpha channel through TTL pins which basically is like a color channel of your video but it is routed to the OSD blend block in order to apply fine alpha blend one pixel at a time. This would allow to create per pixel alpha blending of the external OSD menu with either main video or internal OSD or even both. | b. The second option which requires a bit more hardware is to send the external SOD alpha channel through TTL pins which basically is like a color channel of your video but it is routed to the OSD blend block in order to apply fine alpha blend one pixel at a time. This would allow to create per pixel alpha blending of the external OSD menu with either main video or internal OSD or even both. | ||
+ | ===== Streaming preview video from SPI ===== | ||
+ | The link to DDR2 memory through SPI can be used to load video frames for a small preview of video or live streaming. While video frame rate, quality and size will be limited by SPI speed and available DDR2 DMA speed in ADV8005, small lower quality preview window can be displayed. | ||
+ | |||
+ | ===== Multiple PIP using external OSD ===== | ||
+ | If using an SOC to generate external video, multiple preview video can be tiled int one video which is sent to the external OSD TTL and the ADV8005 internal OSD can partition each tile into PIP sub-windows at different location. This could achieve even live streaming preview as seen on smart TVs. | ||
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The ADV8005 can downscale 1 4k30 video input to 1080p by using the HPS and SVSP. | The ADV8005 can downscale 1 4k30 video input to 1080p by using the HPS and SVSP. | ||
- | ===== POP ===== | + | ===== Picture out of Picture (POP) ===== |
- | POP uses a feature of the PVSP called album mode which can downscale the input video within the input resolution video. Only the PSVSP can do album mode. Usually only main video needs POP while all other videos will be pip within the main video resolution. | + | POP uses a feature of the PVSP called album mode which can downscale the input video within the input resolution video. Only the PVSP can do album mode. Usually only main video needs POP while all other videos will be pip within the main video resolution. |
====== DDR2 bandwidth reference ====== | ====== DDR2 bandwidth reference ====== | ||
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==== PVSP ==== | ==== PVSP ==== | ||
- | The bandwidth is from input video resolution and frame rate. Note tht RNR, interlaced input or frame rate conversion would increase the bandwidth usage if used. | + | The bandwidth is from input video resolution and frame rate. Note that RNR, interlaced input or frame rate conversion would increase the bandwidth usage if used. |
==== SVSP ==== | ==== SVSP ==== | ||
- | Bandwidth is from output video resolution and frame rate. For downscaling, | + | Bandwidth is from output video resolution and frame rate. For downscaling, |
==== HPS ==== | ==== HPS ==== | ||
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The OSD bandwidth varies as per each region size which is better calculated using Blimp’s emulator. Bandwidth maximum is calculated per video line. Of course overlapping regions can double the bandwidth for a video line. | The OSD bandwidth varies as per each region size which is better calculated using Blimp’s emulator. Bandwidth maximum is calculated per video line. Of course overlapping regions can double the bandwidth for a video line. | ||
+ | |||
+ | |||
==== External OSD ==== | ==== External OSD ==== | ||
If an external OSD region is received directly from external OSD TTL input, then it will use the bandwidth of its input video resolution and frame rate. | If an external OSD region is received directly from external OSD TTL input, then it will use the bandwidth of its input video resolution and frame rate. | ||
- | Video resolution Video bits Bandwidth (gbps) | + | ^ Video resolution |
- | For video frame rate = 60Hz | + | | 1080p | 24 bits |
- | 1080p 24bits 5.561828613 | + | | ::: | 32 bits |
- | 32bits 7.415771484 | + | | 720p | 24 bits |
- | 720p 24bits 2.471923828 | + | | ::: | 32 bits |
- | 32bits 3.295898438 | + | | 480p | 24 bits |
- | 480p 24bits 0.926971436 | + | | ::: | 32 bits |
- | 32bits 1.235961914 | + | | 240p | 24 bits |
- | 240p 24bits 0.463485718 | + | | ::: | 32 bits |
- | 32bits 0.617980957 | + | |
• For 16 bits input video, simply divide 32bits value by 2 | • For 16 bits input video, simply divide 32bits value by 2 | ||
• If frame rate different from 60, multiply by frame rate and divide by 60 | • If frame rate different from 60, multiply by frame rate and divide by 60 | ||
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====== Available DDR2 memory bandwidth ====== | ====== Available DDR2 memory bandwidth ====== | ||
- | + | ^ DDR2 memory | |
- | DDR2 memory Bandwidth | + | | Dual | |
- | ( frequency | + | | Single |
- | ( Data bits width = 16) | + | |
- | ( Efficiency = 70%) | + | |
- | Dual 14.90116119 gbps | + | |
- | Single 7.450580597 gbps | + | |
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====== DDR2 chip options ====== | ====== DDR2 chip options ====== | ||
- | When the bandwidth requirement and size for the ADV8005 are below 7.45 gpbs, only one DDR2 chip can be used. This might be specially | + | When the bandwidth requirement and size for the ADV8005 are below 7.45 gpbs, only one DDR2 chip can be used. This might be especially |
====== Application analysis ====== | ====== Application analysis ====== | ||
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===== 4k30 and 1080p input video with 4k30 or 1080p60 video combinations ===== | ===== 4k30 and 1080p input video with 4k30 or 1080p60 video combinations ===== | ||
- | INPUTS | + | ^ |
- | 1080p Main | + | | |
- | 1080p PIP 1080p Main | + | | ::: |
- | 4k30 PIP 4k30 Main | + | ^ Outputs |
- | 1080p PIP 4k30 | + | ^ ::: |
- | 4k30 PIP | + | |
- | OUTPUTS 1080p Out | + | |
- | Supported Supported Supported Requires | + | |
- | 2 ADV8005 | + | |
- | 4k30 Out | + | |
- | Supported Supported Supported supported | + | |
- | + | ||
- | This table assumes PVSP is only used for upscaling with no RNR or interlaced conversion. If any of these features are required, some configuration will need 2 ADV8005 due to bandwidth exceeding. | + | |
- | In the only case above that requires 2 ADV8005, because both inputs need to be downscaled to 1080p, it would need 2 ADV8005. However, note that the ADV8005 doing only downscaling from 4k30 to 1080p would be able to have only one DDR2 memory chip. | + | |
+ | This table assumes PVSP is only used for upscaling with no RNR or interlaced conversion. If any of these features are required, some configurations will need 2 ADV8005 due to bandwidth exceeding. | ||
+ | |||
+ | In the only case above that requires 2 ADV8005, because both inputs need to be downscaled to 1080p, it would need 2 ADV8005. However, note that the ADV8005 doing only downscaling from 4k30 to 1080p would need only one DDR2 memory chip. | ||
====== Glossary ====== | ====== Glossary ====== | ||
OSD: On Screen Display | OSD: On Screen Display | ||
+ | |||
TTL: Parallel video bus which can be fed using ADV7842 or ADV7619 | TTL: Parallel video bus which can be fed using ADV7842 or ADV7619 | ||
+ | |||
PIP: Picture in picture | PIP: Picture in picture | ||
+ | |||
POP: Picture out of picture | POP: Picture out of picture | ||
- | Gbps: gigabits per second | ||
- | |||
+ | Gbps: gigabits per second |