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--- resources:fpga:xilinx:pmod:adxl345 [27 Jan 2012 16:34] – Approved Robin Getz
+++ resources:fpga:xilinx:pmod:adxl345 [09 Jan 2021 00:57] (current) – user interwiki links Robin Getz
@@ Line 1: / Line 1: @@
-====== ADXL345 Xilinx Pmod FPGA Reference Design ======
+====== ADXL345 Pmod Xilinx FPGA Reference Design ======
 ===== Introduction =====
-The [[adi>ADXL345]] is a high resolution (13-bits)3-axis accelerometer for measurements at and up to __+__16g. This reference design allows full programming of the device and reports the measurements along the 3 axes as well as single tap, double tap and free fall.
+The [[adi>ADXL345]] is a small, thin, ultralow power, 3-axis accelerometer with high resolution (13-bit) measurement at up to ±16 g. Digital output data is formatted as 16-bit twos complement and is accessible through either a SPI (3- or 4-wire) or I2C digital interface. The ADXL345 is well suited for mobile device applications. It measures the static acceleration of gravity in tilt-sensing applications, as well as dynamic acceleration resulting from motion or shock. Its high resolution (3.9 mg/LSB) enables measurement of inclination changes less than 1.0°.
-**HW Platform(s):** [[http://www.xilinx.com/products/boards-and-kits/AES-S6MB-LX9.htm|Spartan-6 LX9 Microboard (Avnet)]], [[http://digilentinc.com/Products/Detail.cfm?NavPath=2,719,900&Prod=PMOD-ACL|PMOD-ACL ADXL345 (Digilent)]] \\
+**HW Platform(s):**
-**System:** Microblaze, AXI, UART \\
+   * [[xilinx>products/boards-and-kits/AES-S6MB-LX9.htm|Spartan-6 LX9 Microboard (Avnet)]]
+   * [[http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,897&Prod=NEXYS3|Nexys™3 Spartan-6 FPGA Board (Digilent)]]
+   * [[http://www.em.avnet.com/en-us/design/drc/Pages/Zedboard.aspx|Avnet ZedBoard]] \\
 ===== Quick Start Guide =====
-The bit file provided in the project *.tar.gz file combines the FPGA bit file and the SDK elf files. It may be used for a quick check on the system. All you need is the hardware and a PC running a UART terminal and the programmer (IMPACT).
+The bit file provided in the project *.zip file combines the FPGA bit file and the SDK elf files. It may be used for a quick check on the system. All you need is the hardware and a PC running a UART terminal and the programmer (IMPACT).
 ==== Required Hardware ====
-  * LX9 microboard
+  * [[xilinx>products/boards-and-kits/AES-S6MB-LX9.htm|Spartan-6 LX9 Microboard (Avnet)]]
-  * PMOD-ACL ADXL345 card
+  * [[http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,897&Prod=NEXYS3|Nexys™3 Spartan-6 FPGA Board (Digilent)]]
+  * [[http://www.em.avnet.com/en-us/design/drc/Pages/Zedboard.aspx|Avnet ZedBoard]]
+  * [[http://www.digilentinc.com/Products/Detail.cfm?Prod=PMOD-ACL|PmodACL (Digilent)]]
 ==== Required Software ====
-  * Xilinx ISE 13.2 (Programmer (IMPACT) is sufficient for the demo and is available on Webpack).
+  * Xilinx ISE 14.4 (Programmer (IMPACT) is sufficient for the demo and is available on Webpack).
-  * A UART terminal (Tera Term/Hyperterminal), Baud rate 115200.
+  * A UART terminal (Tera Term/Hyperterminal), Baud rate 115200 for the Avnet LX-9 Microboard and ZedBoard or 9600 for the Digilent Nexys™3 Board.
 ==== Running Demo (SDK) Program ====
-<note tip>If you are not familiar with LX9 and/or Xilix tools, please visit\\ [[http://www.xilinx.com/products/boards-and-kits/AES-S6MB-LX9.htm]] for details.
+<WRAP center round tip 80%>If you are not familiar with LX9 and/or Xilix tools, please visit\\ [[xilinx>products/boards-and-kits/AES-S6MB-LX9.htm]] for details.\\
-</note>
+If you are not familiar with Nexys™3 and/or Xilix tools, please visit\\ [[http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,897&Prod=NEXYS3]] for details.\\
+If you are not familiar with ZedBoard and/or Xilix tools, please visit\\ [[http://www.em.avnet.com/en-us/design/drc/Pages/Zedboard.aspx]] for details.</WRAP>
-Extract the project from the archive file (cf_adxl345.tar.gz) to the location you desire.
+==== Avnet LX9 MicroBoard Setup ====
-To begin, connect the PMOD-ACL board to J4 connector of LX9 board (see image below). You may use a extension cable so that you could move the ADXL345 around/along various axes. Also both 12 pin and 6 pin connections are supported. Only the interrupt driven mode requires the 12 pin connection. Connect the USB cables from the PC to the board.
+Extract the project from the archive file (ADXL345_<board_name>.zip) to the location you desire.
-{{:resources:fpga:xilinx:pmod:cf_adxl345_setup.jpg?200|Hardware setup}}
-Start IMPACT, and initialze the JTAG chain. The program should recognize the Spartan 6 device (see screenshot below). Start a UART terminal (set to 115200 baud rate) and then program the device using the bit file provided in the project *.tar.gz archive, located in the “sw” folder (../cf_adxl345/sw/cf_adxl345.bit).
+To begin, connect the PmodACL to J5 connector of LX9 board (see image below). You can use an extension cable for ease of use. Connect the USB cable from the PC to the USB-UART female connector of the board for the UART terminal. The board will be programmed through its USB male connector.
-{{:resources:fpga:xilinx:pmod:cf_adxl345_impact.jpg?200|IMPACT}}
+{{:resources:fpga:xilinx:pmod:pmodACL.jpg?200|PmodACL and LX-9}}
-If programming was successful, you should be seeing messages appear on the terminal as shown in figure below. After programming the ADXL345 device, the program continously monitors the X, Y and Z axes values as well as single tap, double tap and free fall detection. You may quit the program any time by pressing 'q' and then the 'Enter' key.
+==== Digilent Nexys™3 Spartan-6 FPGA Board ====
-{{:resources:fpga:xilinx:pmod:cf_adxl345_uart_1.jpg?200|Terminal Main}}
+Extract the project from the archive file (ADXL345_<board_name>.zip) to the location you desire.
-{{:resources:fpga:xilinx:pmod:cf_adxl345_uart_2.jpg?200|Terminal Axes}}
-{{:resources:fpga:xilinx:pmod:cf_adxl345_uart_3.jpg?200|Terminal ST/DT/FF}}
+To begin, connect the PmodACL to JA connector of NEXYS3 board (see image below). You can use an extension cable for ease of use. Connect the USB cables from the PC to the board, one for programming (Digilent USB device) and one for the UART terminal (FT232R USB UART).
+{{:resources:fpga:xilinx:pmod:pmodacl_nexys3.jpg?200|PmodACL and Nexys™3}}
+==== Avnet ZedBoard ====
+To begin, connect the PmodACL to JA1 connector of ZedBoard (see image below). You can use an extension cable for ease of use. Connect the USB cables from the PC to the board, one for programming (Digilent USB device) and one for the UART terminal (FT232R USB UART).
+{{:resources:fpga:xilinx:pmod:pmodacl_zed.jpg?200|PmodACL and ZedBoard}}
+==== FPGA Configuration for Nexys3 and LX-9 MicroBoard ====
+Start IMPACT, and double click "Boundary Scan". Right click and select Initialize Chain. The program should recognize the Spartan 6 device (see screenshot below). Start a UART terminal (set to appropiate baud rate) and then program the device using the bit file provided in the project *.zip archive, located in the "sw" folder (../adxl345/sw/ADXL345.bit).
+{{:resources:fpga:xilinx:pmod:PmodACLImpact.jpg?200|Programming FPGA in IMPACT}}
+==== FPGA Configuration for ZedBoard ====
+Run the **download.bat** script from the "../bin" folder downloaded from the github (see the links in the download section of the wiki page).
+The script will automatically configure the ZYNQ SoC and download the *.elf file afterwards.
+<WRAP center round tip 80%>
+If the download script fails to run, modify the Xilinx Tools path in **download.bat** to match your Xilinx Installation path.
+</WRAP>
+If programming was successful, the **Main Menu** will apear in your UART terminal, as seen in the picture below. There are 7 options. Pressing [e], [d], [a], [s], [r], [t] or [q] key will allow you to select the desired option.
+After the end of every option, all the possible options (the Menu) will be shown again, allowing the user to make a new choice.
+{{:resources:fpga:xilinx:pmod:pmodacl_menu1.jpg?600|Main Menu}}\\
+**Enable Measurement** sets the ADXL345 into measurement mode. Any measurement that takes place from that moment on will be valid data.
+{{:resources:fpga:xilinx:pmod:pmodacl_menu2.jpg?600|Enable Measurement}}\\
+**Disable Measurement** sets the ADXL345 into standby mode. Any measurement that takes place from that moment will not be valid data (usually 0).
+{{:resources:fpga:xilinx:pmod:pmodacl_menu3.jpg?600|Disable Measurement}}\\
+**Display Acceleration** displays acceleration data on all 3 Axes.
+{{:resources:fpga:xilinx:pmod:pmodacl_menu4.jpg?600|Acceleration on all 3 Axes}}\\
+**Select Measurement Range** allows choosing between 4 options: ±2g, ±4g, ±8g and ±16g. Desired measurement range is selected by pressing [1] to [4].
+{{:resources:fpga:xilinx:pmod:pmodacl_menu5.jpg?600|Selecting Measurement Range}}\\
+**Change Acquisition Rate** allows choosing different Acquisition rates for the ADXL345. Desired option is selected by pressing [1] to [9].
+{{:resources:fpga:xilinx:pmod:pmodacl_menu6.jpg?600|Acquisition Rate}}\\
+**Select Tap Interrupts** allows enabling or disabling tap interrupts. Desired option is selected by pressing [1] to [4]. If the tap option selected is [1] or [3], after a single tap, D2 (LX9) / LD0 (Nexys3 and ZedBoard) will be ON. If the tap option selected is [2] or [3], after two consecutive taps, D3 and D2 (LX9) / LD1 and LD0 (Nexys3 and ZedBoard) will both be on at the same time. If the tap option selected is [4], no LEDs will be ON after a single or double tap.
+{{:resources:fpga:xilinx:pmod:pmodacl_menu7.jpg?600|Select Tap Interrupts}}\\
+**Stop any ongoing action** will stop any display of measurements and afterwards display the Main Menu.
+{{:resources:fpga:xilinx:pmod:pmodacl_menu1.jpg?600|Stop actions}}\\
 ===== Using the reference design =====
@@ Line 47: / Line 105: @@
 ==== Functional Description ====
-The reference design is a simple SPI interface for the ADXL345. The software programs the device, monitors and reports the axes, single tap, double tap and free fall. The information is displayed on UART.
+The reference design is a SPI interface used to communicate with the device. The software programs the ADXL345 internal registers, and afterwards reads desired data from the device and prints it via UART. Three Interrupt signals are used in the design: one coming from the ADXL345, one from the UART and a timer interrupt (used for single and double tap LED signaling).
-The hardware supports both 12 pin and 6 pin connections.
-The hardware SPI access allows read or write of any ADXL345 registers via the address, write and read data registers. A status output is connected to the 4 LED(s) on board as follows :-
-STATUS_FF_ST:  Free fall/single tap \\
+<WRAP round important 80%>
-STATUS_FF_DT:  Free fall/double tap \\
+\\
-STATUS_XY:  X/Y axis change \\
+  * Connecting the PmodACL to the boards using an extension cable provides ease of use.
-STATUS_Z: Z axis change \\
+  * UART must be set to 115200 Baud Rate for the Avnet LX-9 Microboard and ZedBoard or 9600 Baud Rate for the Digilent Nexys™3 Board.
+\\
+</WRAP>
-In most cases, a simple SPI access is all the software need. However, in order to reduce the overhead on software running on Microblaze SDK (to keep I/D BRAM small), a hardware assisted mode is provided. In this mode, hardware mirrors a few key registers of ADXL345 in it's own address space.
+<WRAP round important 80%>
+When using the ZedBoard reference design in order to develop your own software, please make sure that the following options are set in "system_config.h":
-The hardware supports three modes of operation:
+<code c>
+// Select between PS7 or AXI Interface
+#define USE_PS7 	 1
+// SPI used in the design
+#define USE_SPI		 1
+// I2C used in the design
+#define USE_I2C		 0
+// Timer (+interrupts) used in the design
+#define USE_TIMER	 1
+// External interrupts used in the design
+#define USE_EXTERNAL     1
+// GPIO used in the design
+#define USE_GPIO         1
+</code>
-Software triggered: In this mode, software must initiate the read to update the mirrored registers. \\
+</WRAP>
-Interrupt triggered: In this mode, ADXL345's INT1, INT2 pins trigger update of the mirrored registers. \\
+===== Downloads =====
-Free run: In this mode, hardware free runs and continously updates the mirrored registers. \\
+<WRAP round download 80%>
+\\
+**Avnet LX-9 MicroBoard: **\\
+    * {{:resources:fpga:xilinx:pmod:adxl345_lx9.zip|Reference design source code for Avnet LX9 MicroBoard.}}\\
-==== Registers ====
+**Digilent Nexys™3:**\\
-^ QW Address<sup>1</sup> ^ Bits ^ Default ^ Name ^ Description ^
+    * {{:resources:fpga:xilinx:pmod:adxl345_nexys3.zip|Reference design source code for Digilent Nexys™3 Spartan-6 FPGA Board.}}\\
-| 0x00 | 7 | 0 | mode | Free run (0x1) or sw/hw controlled (0x0). |
-|      | 6 | 0 | int_inv | Invert (0x1) interrupt pins. |
-|      | 5 | 0 | access  | SPI access sw (0x1) or hw (0x0). |
-|      | 4 | 0 | trigger | Software trigger, requires a 0x0 to 0x1 transition. |
-|      | 3:0 | 0 | status | Software status, ignored if hardware is active. |
-| 0x01 | 31 | 0 | rwn | SPI access, read (0x1) or write (0x0). |
-|      | 29:24 | 0 | addr | SPI access, address. |
-|      | 23:16 | 0 | wdata | SPI access, write data. |
-|      | 15 | 0 | done | SPI access, complete (0x1) or busy (0x0). |
-|      | 7:0 | 0 | rdata | SPI access, read data. |
-| The following registers are provided for simultaneous access in free run and interrupt triggered modes |||||
-| 0x03 | 15:0 | 0 | x_axis | X Axis data. |
-| 0x04 | 15:0 | 0 | y_axis | Y Axis data. |
-| 0x05 | 15:0 | 0 | z_axis | Z Axis data. |
-| 0x06 | 15:0 | 0 | x_axis | ACT/TAP data. |
-| 0x07 | 15:0 | 0 | x_axis | INT source data. |
-| 0x08 | 15:0 | 0 | x_axis | FIFO status data. |
-| 0x09 | 3:0 | 0 | state | Hw state (for debug purposes only). |
-| 1. For AXI-Lite byte addresses, multiply by 4. |||||
+**Avnet ZedBoard:**\\
+    * [[https://github.com/analogdevicesinc/fpgahdl_xilinx/tree/master/cf_adv7511_zed|XPS Project]]\\
+    * [[https://github.com/analogdevicesinc/no-OS/tree/master/Pmods/PmodACL|PmodACL Driver Files]]\\
+    * [[https://github.com/analogdevicesinc/no-OS/tree/master/Pmods/Common/sw|ZYNQ SoC Peripherals Driver Files]] \\
+    * [[https://github.com/analogdevicesinc/no-OS/tree/master/Pmods/PmodACL/bin|Programming Script]]\\
+</WRAP>
+<wrap hide>
+====== Linux Device Driver ======
+Connect PmodACL to the JA1 connector of the ZedBoard (upper row of pins).
-==== Notes ====
+===== Preparing the SD Card =====
-PMOD-ACL must be connected to J4, with pin 1 matching up on both the connectors. \\
+In order to prepare the SD Card for booting Linux on the ZedBoard:
-UART must be set to 115200 baudrate. \\
+    * Download the device tree: [[https://github.com/analogdevicesinc/no-OS/tree/master/Pmods/PmodACL/dts|PmodACL Linux devicetree]]
+    * Configure the kernel to include the driver for the ADXL345: [[/resources/tools-software/linux-drivers/input-misc/adxl345|Compiling the ADXL345 driver into the kernel]]
+    * Follow the instructions on the following wiki page, but use the device tree downloaded on the previous step and the kernel configuration above
+        * [[/resources/tools-software/linux-drivers/platforms/zynq|Linux with HDMI video output on the ZED and ZC702]]. When following those instructions make sure to copy the devicetree file that was downloaded in step 1) to arch/arm/boot/dts/zynq-zed-adv7511-pmod-acl.dts before trying to build the zynq-zed-adv7511-pmod-acl.dtb file.
-**A debug data and trigger port is provided for internal monitoring of all the signals in the design.**
+Make sure you have an HDMI monitor connected to the ZedBoard, plug in the SD Card and power on the board.
+If everything is correct, the system should boot up. If you don't have an HDMI monitor, connect to the board via UART, Baud Rate 115200.
-===== Downloads =====
+There are 2 ways to test the driver.
+    * Using the terminal window
+    * Using a serial terminal
-{{:resources:fpga:xilinx:pmod:cf_adxl345.tar.gz|Reference design source code}}
+===== Using the terminal window =====
-===== More information =====
+Open a new terminal window by pressing **Ctrl+Alt+T**.
-  * [[ez>community/fpga|ask questions about the FPGA reference design]]
+Navigate to the location of the device and identify it using the following commands:
+<code>
+cd /sys/bus/spi/devices/
+ls
+spi32765.0  spi32766.0
+cd spi32766.0
+cat modalias
+spi:adxl34x
+</code>
+If the **cat name** command doesn't return **spi:adxl34x**, then change the spi:device, and check again.
+<code>
+cd ..
+cd spi32765.0
+cat modalias
+</code>
+To see the list of options that the ADXL345 driver provides, type:
+<code>
+ls
+autosleep  disable  input     position  rate       uevent
+calibrate  driver   modalias  power     subsystem
+</code>
+To calibrate the device, type:
+<code>
+echo 1 > calibrate
+cat calibrate
+,3,-218
+</code>
+To read the position, type:
+<code>
+cat position
+(1, 0, 1)
+</code>
+{{:resources:fpga:xilinx:pmod:adxl345_linaro_terminal.jpg?600|ADXL345 Set Voltage from Terminal}}
+The commands written above can also be used if not using an HDMI monitor and a wireless keyboard, by using a serial terminal, and typing the commands after the system boot-up is complete.
+{{:resources:fpga:xilinx:pmod:adxl345_linux_serial.jpg?600|ADXL345 Read Voltage from Serial Terminal}}
+</wrap>
+===== More information =====
+  * [[ez>community/fpga|ask questions about the FPGA reference design]]
+  * Example questions: {{rss>http://ez.analog.com/community/feeds/allcontent/atom?community=2061 5 author 1d}}

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