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resources:fpga:xilinx:kc705:adv7511 [18 Nov 2019 10:31] – Update block diagram Stanca-Florina Popresources:fpga:xilinx:kc705:adv7511 [08 Feb 2021 13:21] (current) – Change broken link Iulia Moldovan
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 ===== Introduction ===== ===== Introduction =====
  
-The [[adi>ADV7511]] is a 225 MHz High-Definition Multimedia Interface (HDMI®) transmitter. It is part of the [[http://www.xilinx.com/ac701|Artix-7 AC701]], [[http://www.xilinx.com/kc705|Kintex-7 KC705]], [[http://www.xilinx.com/vc707|Virtex-7 VC707]], [[http://www.xilinx.com/zc702|Zynq ZC702]], [[http://www.xilinx.com/zc706|Zynq ZC706]] and the [[http://www.xilinx.com/zed|Zynq ZED]] evaluation boards. This reference design provides the video and audio interface between the FPGA and ADV7511 on board. The video uses a 16bit 422 YCbCr interface (except VC707 which uses 36bit 444 RGB interface) and the audio uses a single bit SPDIF interface.+The [[adi>ADV7511]] is a 225 MHz High-Definition Multimedia Interface (HDMI®) transmitter. It is part of the [[xilinx>ac701|Artix-7 AC701]], [[xilinx>kc705|Kintex-7 KC705]], [[xilinx>vc707|Virtex-7 VC707]], [[xilinx>zc702|Zynq ZC702]], [[xilinx>zc706|Zynq ZC706]] and the [[xilinx>products/boards-and-kits/1-8dyf-11.html|Zynq ZED]] evaluation boards. This reference design provides the video and audio interface between the FPGA and ADV7511 on board. The video uses a 16bit 422 YCbCr interface (except VC707 which uses 36bit 444 RGB interface) and the audio uses a single bit SPDIF interface.
  
 ===== Supported Carriers ===== ===== Supported Carriers =====
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   * [[xilinx>ZC702]]    * [[xilinx>ZC702]] 
   * [[xilinx>ZC706]]    * [[xilinx>ZC706]] 
-  * [[http://zedboard.com/product/zedboard|ZED Board]] +  * [[xilinx>products/boards-and-kits/1-8dyf-11.html|ZED Board]] 
  
  
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 ==== Running Demo (SDK) Program ==== ==== Running Demo (SDK) Program ====
  
-To begin, connect an HDMI cable between the board HDMI out and the HDMI monitor. After the hardware setup, turn the power on to the board.+The following steps will get your system up and running.
  
-Run the **//evaluate.bat//** script. This script uses XMD to program the FPGA with the HDL Reference Design and download the Software Reference Design into the DDR. +  - To begin, connect an HDMI cable between the board HDMI out and the HDMI monitor. After the hardware setup, turn the power on to the board. 
 +  - Download the [[adi>media/en/dsp-hardware-software/software-modules/ADV7511_API_Library.exe | ADV7511 HDMI Transmitter Library]] and install it. Go to the **installation folder -> Src** and copy the TX folder into the **no-OS repo folder -> projects -> adv7511**. 
 +  - Build the HDL project according to the [[/resources/fpga/docs/build |Building HDL wiki]] and copy the resulting .hdf file to the **no-OS repo folder -> projects -> adv7511**. 
 +  - Choose the carrier board in the software by uncommenting the appropriate define in the **src/app_config.h** file. For example, if the Zedboard carrier is needed, uncomment the #define PLATFORM_ZED in the file. {{ :resources:fpga:xilinx:kc705:example_soft_platform_choice.png |}} 
 +  - Build the software project according to the [[https://github.com/analogdevicesinc/no-OS/wiki | Github wiki]].50
  
-**Note:** If your Xilinx installation path is different than the one specified in the //evaluate.bat//, please modify the script accordingly.+<note>If on Linux you would need Wine or similar compatibility layers for Windows to install the library.</note>
  
 If programming was successful, you should be seeing messages appear on the terminal as shown in figure below.  If programming was successful, you should be seeing messages appear on the terminal as shown in figure below. 
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 === Xilinx block diagram === === Xilinx block diagram ===
-{{resources:fpga:xilinx:fmc:fmc-imageon:adv7511_zynq.svg?800|HDL Block Diagram}}+{{resources:fpga:xilinx:fmc:fmc-imageon:adv7511_zynq_2.svg?800|HDL Block Diagram}}
  
 === ADV7511 block diagram === === ADV7511 block diagram ===
-{{resources:fpga:xilinx:fmc:fmc-imageon:adv7511_proc.svg?600|HDL Block Diagram}}+{{resources:fpga:xilinx:fmc:fmc-imageon:adv7511_proc_1.svg?600|HDL Block Diagram}}
  
 The reference design consists of two independent pcore modules. The reference design consists of two independent pcore modules.
  
-The video part consists of a Xilinx VDMA interface and the ADV7511 video interface. The ADV7511 interface consists of a 16bit YCbCr 422 with separate synchorinzation signals. The VDMA streams frame data to this core. The internal buffers of this pcore are small (1k) and do NOT buffer any frames as such. Additional resources may cause loss of synchronization due to DDR bandwidth requirements. The video core is capable of supporting any formats through a set of parameter registers (given below). The pixel clock is generated internal to the device and must be configured for the correct pixel frequency. It also allows a programmable color pattern for debug purposes. A zero to one transition on the enable bits trigger the corresponding action for HDMI enable and color pattern enable.+The video part consists of an AXI DMAC interface and the ADV7511 video interface. The ADV7511 interface consists of a 16bit YCbCr 422 with separate synchroinzation signals. The DMA streams frame data to this core. The internal buffers of this pcore are small (1k) and do NOT buffer any frames as such. Additional resources may cause loss of synchronization due to DDR bandwidth requirements. The video core is capable of supporting any formats through a set of parameter registers (given below). The pixel clock is generated internal to the device and must be configured for the correct pixel frequency. It also allows a programmable color pattern for debug purposes. A zero to one transition on the enable bits trigger the corresponding action for HDMI enable and color pattern enable.
  
 The reference design defaults to the 1080p video mode. Users may change the video settings by programming the following registers. The core requires a corresponding pixel clock to generate the video. This clock must be generated externally. The reference design defaults to the 1080p video mode. Users may change the video settings by programming the following registers. The core requires a corresponding pixel clock to generate the video. This clock must be generated externally.
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 A color pattern register provides a quick check of any RGB values on the monitor. If enabled, the register data is used as the pixel data for the entire frame. A color pattern register provides a quick check of any RGB values on the monitor. If enabled, the register data is used as the pixel data for the entire frame.
  
-The audio part consists of a Xilinx DMA interface and the ADV7511 spdif audio interface. The audio clock is derived from the bus clock. A programmable register (see below) controls the division factor. The audio data is read from the DDR as two 16bit words for the left and right channels. It is then transmitted on the SPDIF frame. The sample frequency and format may be controlled using the registers below. The reference design defaults to 48KHz.+The audio part consists of an AXI DMAC interface and the ADV7511 spdif audio interface. The audio clock is derived from the bus clock. A programmable register (see below) controls the division factor. The audio data is read from the DDR as two 16bit words for the left and right channels. It is then transmitted on the SPDIF frame. The sample frequency and format may be controlled using the registers below. The reference design defaults to 48KHz.
  
 ==== Registers ==== ==== Registers ====
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 The project contains 2 components: the Reference Design files and the ADV7511 Transmitter Library. All the components have to be downloaded from the links provided in the **Downloads** section. The project contains 2 components: the Reference Design files and the ADV7511 Transmitter Library. All the components have to be downloaded from the links provided in the **Downloads** section.
  
-==== Software Setup for Vivado ==== +==== Serial Setup ====
- +
-Example for a ZC702 board: +
-  * After [[http://wiki.analog.com/resources/fpga/docs/hdl#building_on_vivado | building the project in Vivado]] for the used FPGA board, a //**SDK_Export**// folder will be created in //**../adv7511_board.sdk/SDK**// +
-  * Open the Xilinx SDK for Vivado. When the SDK starts it asks to provide a folder where to store the workspace. Any folder can be provided.  +
-  * Go to //**File->New->Application project**// +
-{{ :resources:fpga:xilinx:fmc:fmc-imageon:adv7511_new_app_project.png?600 | New Application Project }} +
-  * Use a new hardware platform, so choose //**New**// in //**Target Hardware**// section +
-{{ :resources:fpga:xilinx:fmc:fmc-imageon:adv7511_new_platform.png?400 | New Platform }}   +
-  * At the **Target Hardware Specification** section browse the location of the hardware description file. This file's extension should be **.xml** or **.hdf**, and is located in the directory of the hdl design. **Note:** If the file does not exist, probably you forgot to make an **Export hardware** (in Vivado **File** -> **Export** -> **Export Hardware...**) +
-{{ :resources:fpga:xilinx:fmc:fmc-imageon:adv7511_new_hardware_project.png?400 | New Hardware Project }}  +
-  * Then give a name to the project and click //**Next**// +
-{{ :resources:fpga:xilinx:fmc:fmc-imageon:adv7511_project_name.png?400 | Project Name }}   +
-  * In the next window choose //**Empty Application**// and click //**Finish**// +
-{{ :resources:fpga:xilinx:fmc:fmc-imageon:adv7511_templates.png?400 | Available Templates }}    +
-  * Now the project without source code looks like this +
-{{ :resources:fpga:xilinx:fmc:fmc-imageon:adv7511_empty_project_zynq.png?600 | Empty Project }}  +
-  * Then the no-OS software for the used FPGA board must be added from Github. Also the library must be added (ZC library for a Zynq based platform(except ZED), ZED library for a ZED platform or Microblaze library for AC701,KC705,VC707). +
-{{ :resources:fpga:xilinx:fmc:fmc-imageon:adv7511_project_without_include_directory_and_library.png?600 | Project without directory and library path }}  +
-  * Afterwards click right on project name and go to //**Properties**// +
-{{ :resources:fpga:xilinx:fmc:fmc-imageon:adv7511_project_properties.png?600 | Project properties }} +
-  * In the window that appears, go to //**Settings->Directories**// and include the path of the //**inc**// directory for both //**Debug**// and //**Release**// configurations. +
-{{ :resources:fpga:xilinx:fmc:fmc-imageon:adv7511_settings_include_directory_path.png?600 | Include directory path }} +
-  * In the same window, go to //**Settings->Libraries**// and add the path of the //**lib**// folder and the name of the library used. For a Zynq based platform the name is //**HDMI_ZynqLib**// (libHDMI_ZynqLib.a on Github) and for a Microblaze the name is //**HDMI_MicroblazeLib**// (libHDMI_MicroblazeLib.a on Github)  +
-{{ :resources:fpga:xilinx:fmc:fmc-imageon:adv7511_settings_include_library_path.png?600 | Include library path }} +
-  * The //Project Explorer// window now shows the projects that exist in the workspace and the files for each project. The SDK should automatically build the projects and the Console window will display the result of the build. If the build is not done automatically select the //**Project->Build Automatically**// menu option. +
-{{ :resources:fpga:xilinx:fmc:fmc-imageon:adv7511_project_explorer_zynq.png?600 | Project Explorer }} +
-  * At this point the software project setup is complete, the FPGA can be programmed and the software can be downloaded into the system. You can program the FPGA by going to //**Xilinx Tools**//. +
-{{ :resources:fpga:xilinx:fmc:fmc-imageon:adv7511_program_fpga.png?600 | Program FPGA}} +
-  * Then choose this bitstream and press //**Program**//. +
-{{ :resources:fpga:xilinx:fmc:fmc-imageon:adv7511_program_fpga_with_bitstream.png?400 | Program FPGA with bitstream}} +
-  * This window will appear next. +
-{{ :resources:fpga:xilinx:fmc:fmc-imageon:adv7511_program_fpga_progress.png?400 | Program FPGA progress}} +
-  * Afterwards a //Run Configuration// must be created and then press //**Run**//. +
-{{ :resources:fpga:xilinx:fmc:fmc-imageon:adv7511_run_configuration_.png?600 | Run Configuration}}+
  
   * The no-OS drivers source code does the following actions:   * The no-OS drivers source code does the following actions:
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   * This is what is transmitted through UART:   * This is what is transmitted through UART:
 {{ :resources:fpga:xilinx:fmc:fmc-imageon:adv7511_uart.png?400 | UART }} {{ :resources:fpga:xilinx:fmc:fmc-imageon:adv7511_uart.png?400 | UART }}
-  * The output of the example program can be viewed in the SDK console by enabling the //Connect STDIO Console// option and setting the baud rate of the UART port to 115200. 
-{{ :resources:fpga:xilinx:fmc:fmc-imageon:adv7511_stdio_config_vivado.png?600 | STDIO configuration }}  
  
 As an alternative an UART terminal can be used to capture the output of the example program. The number of used UART port depends on the computer's configuration. The following settings must be used in the UART terminal: As an alternative an UART terminal can be used to capture the output of the example program. The number of used UART port depends on the computer's configuration. The following settings must be used in the UART terminal:
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 The HDL Reference Designs and the no-OS Software can be downloaded from the Analog Devices Github.\\ The HDL Reference Designs and the no-OS Software can be downloaded from the Analog Devices Github.\\
 \\ \\
- 
-**Evaluation Scripts:** 
-<WRAP round download 80%> 
-    * **AC701 Evaluation Script: ** [[https://github.com/analogdevicesinc/no-OS/tree/master/adv7511/evaluate/ac701]] 
-    * **KC705 Evaluation Script: ** [[https://github.com/analogdevicesinc/no-OS/tree/master/adv7511/evaluate/kc705]] 
-    * **VC707 Evaluation Script: ** [[https://github.com/analogdevicesinc/no-OS/tree/master/adv7511/evaluate/vc707]] 
-    * **ZC702 Evaluation Script: ** [[https://github.com/analogdevicesinc/no-OS/tree/master/adv7511/evaluate/zc702]] 
-    * **ZC706 Evaluation Script: ** [[https://github.com/analogdevicesinc/no-OS/tree/master/adv7511/evaluate/zc706]] 
-    * **Zed Evaluation Script: ** [[https://github.com/analogdevicesinc/no-OS/tree/master/adv7511/evaluate/zed]] 
-</WRAP> 
  
 **HDL Reference Designs:** **HDL Reference Designs:**
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 **no-OS Software:** **no-OS Software:**
 <WRAP round download 80%> <WRAP round download 80%>
-  * **ADV7511 MicroBlaze Library: ** https://github.com/analogdevicesinc/no-OS/tree/master/adv7511/library/microblaze +  * **ADV7511 Project: ** https://github.com/analogdevicesinc/no-OS/tree/master/projects/adv7511
-  * **ADV7511 AC701 Reference Design: ** https://github.com/analogdevicesinc/no-OS/tree/master/adv7511/ac701 +
-  * **ADV7511 KC705 Reference Design: ** https://github.com/analogdevicesinc/no-OS/tree/master/adv7511/kc705  +
-  * **ADV7511 VC707 Reference Design: ** https://github.com/analogdevicesinc/no-OS/tree/master/adv7511/vc707 +
-  * **ADV7511 ZC Library: ** https://github.com/analogdevicesinc/no-OS/tree/master/adv7511/library/zc +
-  * **ADV7511 ZC702 Reference Design: ** https://github.com/analogdevicesinc/no-OS/tree/master/adv7511/zc702  +
-  * **ADV7511 ZC706 Reference Design: ** https://github.com/analogdevicesinc/no-OS/tree/master/adv7511/zc706 +
-  * **ADV7511 ZedBoard Library: ** https://github.com/analogdevicesinc/no-OS/tree/master/adv7511/library/zed +
-  * **ADV7511 ZedBoard Reference Design: ** https://github.com/analogdevicesinc/no-OS/tree/master/adv7511/zed +
 </WRAP> </WRAP>
  
 <WRAP round help 80%> <WRAP round help 80%>
-  * Questions? [[https://ez.analog.com/community/fpga|Ask Help & Support]].+  * Questions? [[ez>community/fpga|Ask Help & Support]].
 </WRAP> </WRAP>
  
resources/fpga/xilinx/kc705/adv7511.1574069519.txt.gz · Last modified: 18 Nov 2019 10:31 by Stanca-Florina Pop

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