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resources:fpga:xilinx:interposer:cn0150 [09 Apr 2012 10:43] – [More information] Andrei Cozma | resources:fpga:xilinx:interposer:cn0150 [09 Jan 2021 00:49] (current) – user interwiki links Robin Getz | ||
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* [[adi> | * [[adi> | ||
- | ===== Evaluation Boards | + | ===== Reference Circuits |
- | + | ||
- | * [[adi> | + | |
+ | * [[adi> | ||
====== Overview ====== | ====== Overview ====== | ||
- | This document presents the steps to setup an environment for using the **[[adi> | + | This document presents the steps to setup an environment for using the **[[adi> |
{{ : | {{ : | ||
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* [[adi> | * [[adi> | ||
* [[adi> | * [[adi> | ||
- | * [[adi>/ | + | * [[adi> |
- | * [[http://www.xilinx.com/products/ | + | * [[xilinx>products/ |
- | * [[http:// | + | |
====== Getting Started ====== | ====== Getting Started ====== | ||
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===== Required Hardware ===== | ===== Required Hardware ===== | ||
- | * [[http://www.xilinx.com/products/ | + | * [[xilinx>products/ |
* FMC-SDP adapter board | * FMC-SDP adapter board | ||
* **EVAL-CN0150-SDPZ** evaluation board | * **EVAL-CN0150-SDPZ** evaluation board | ||
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===== Required Software ===== | ===== Required Software ===== | ||
- | * Xilinx ISE 13.4 (Programmer (IMPACT) is sufficient for the demo and is available on Webpack). | + | * Xilinx ISE 14.6. |
- | * [[http://micrium.com/ | + | * UART Terminal (Termite/Tera Term/Hyperterminal), |
+ | * The EVAL-CN0150 reference project for Xilinx KC705 FPGA. | ||
===== Downloads ===== | ===== Downloads ===== | ||
- | + | <WRAP round download 80%> | |
- | * {{:resources: | + | \\ |
- | + | * **AD7887 Driver:** https://github.com/ | |
- | The following table presents a short description the reference design archive contents. | + | * **CN0150 Commands:** https:// |
- | + | | |
- | ^ **Folder** ^ **Description** ^ | + | * **EDK KC705 Reference |
- | | Bit | Contains the KC705 configuration file that can be used to program the system for quick evaluation. | | + | \\ |
- | | Microblaze | Contains the EDK 13.4 project for the Microblaze softcore that will be implemented in the KC705 FPGA. | | + | </ |
- | | Software | Contains the source files of the software | + | |
- | | uCProbeInterface | Contains the uCProbe interface and the .elf symbols file used by uC-Probe to access data from the Microbalze memory. | | + | |
====== Run the Demonstration Project ====== | ====== Run the Demonstration Project ====== | ||
- | {{page> | + | ===== Hardware setup ===== |
- | + | ||
- | ===== Demonstration Project User Interface | + | |
- | + | ||
- | The following figure presents the **uC-Probe** interface that can be used for monitoring and controlling the operation of the **EVAL-CN0150A-SDPZ** evaluation board. | + | |
- | + | ||
- | {{ : | + | |
- | + | ||
- | **Section A** is used to activate the board and monitor activity. The communication with the board is activated / deactivated by toggling the **// | + | |
- | + | ||
- | **Section B** is used to select the sample size and to initiate a data acquisition. | + | |
- | + | ||
- | **Section C** is used to store the calibration data and to display the calculated information. The calibration is performed by applying four known signal levels to the ADL5902 and measuring the corresponding output codes from the ADC. The calibration points chosen should be within the linear operating range of the device. In this example, calibration points at -30 dBm, -20 dBm, -10 dBm, and 0 dBm were used. | + | |
- | + | ||
- | < | + | |
- | User has to add manually ADC Code and Input Power for each signal, in the Calibration Data section. Frequency and temperature are optional. Slope and Intercept are calculated by the interface. | + | |
- | </ | + | |
- | + | ||
- | The SLOPE and INTERCEPT calibration coefficients are calculated using the equations: | + | |
- | + | ||
- | * SLOPE1 = ( CODE _1 – CODE_2) / (PIN_1 - PIN_2) | + | |
- | + | ||
- | * INTERCEPT1 = CODE_1 / (SLOPE_ADC × PIN_1) | + | |
- | + | ||
- | This calculation is then repeated using CODE_2/ | + | |
- | When the circuit is in operation in the field, these calibration coefficients are used to calculate an unknown input power level, PIN, using the equation: | + | <WRAP round important 80%> |
+ | \\ | ||
+ | Before connecting | ||
+ | </ | ||
- | * PIN = (CODE / SLOPE) + INTERCEPT | + | * Use the FMC-SDP interposer to connect the ADI evaluation board to the Xilinx KC705 board on the FMC LPC connector. |
+ | * Connect the JTAG and UART cables to the KC705 and power up the FPGA board. | ||
- | In order to retrieve the appropriate SLOPE and INTERCEPT | + | ===== Reference Project Overview ===== |
+ | The following commands were implemented in this version of EVAL-CN0150 reference project for Xilinx KC705 FPGA board. | ||
+ | ^ Command ^ Description ^ | ||
+ | | **help?** | Displays all available commands. | | ||
+ | | **calibration=** | Makes a two points calibration. Accepted values:\\ power input1:\\ -50 .. -5 - first point input power in [dBm].\\ power input2:\\ -50 .. -5 - second point input power in [dBm]. | | ||
+ | | **pinCalc? | ||
+ | | **error?** | Displays | ||
- | < | + | Commands can be executed using a serial terminal connected |
- | The interface chooses the slope and intercept for each ADC code and calculates the Power. For the error to be calculated, it is necessary | + | |
- | </ | + | |
- | ===== Troubleshooting ===== | + | The following image shows a generic list of commands in a serial terminal connected to Xilinx KC705 FPGA's UART peripheral. |
+ | {{ : | ||
- | In case there is a communication problem with the board the follwing actions can be perfomed in order to try to fix the issues: | + | ===== Software Project Setup ===== |
- | * Check that the evaluation board is powered as instructed in the board' | + | {{page> |
- | * In uC-Probe refresh the symbols file by right-clicking on the **//System Browser//** window and selecting **//Refresh Symbols// | + | |
- | * If the communication problem persists even after performing the previous steps, restart the uC-Probe application and try to run the interface again. | + | |
====== More information ====== | ====== More information ====== | ||
* [[resources: | * [[resources: | ||
- | * [[ez>community/ | + | {{page>ez_common}} |