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This version (13 Nov 2013 15:27) was approved by LucianS.The Previously approved version (16 Nov 2012 17:44) is available.Diff

CN0150 FMC-SDP Interposer & Evaluation Board / Xilinx KC705 Reference Design

Supported Devices

Reference Circuits

Overview

This document presents the steps to setup an environment for using the EVAL-CN0150A-SDPZ evaluation board together with the Xilinx KC705 FPGA board and the Xilinx Embedded Development Kit (EDK). Below is presented a picture of the EVAL-CN0150A-SDPZ Evaluation Board with the Xilinx KC705 board.

cn0150.jpg

For component evaluation and performance purposes, as opposed to quick prototyping, the user is directed to Analog Devices System Demonstration Platform (SDP). The SDP consists of a:

The EVAL-SDP-CB1Z controller board is part of Analog Devices SDP providing USB 2.0 high-speed connectivity to a PC computer running specific component evaluation software. Each SDP evaluation daughter board includes the necessary installation files needed for this performance testing. It's expected that the analog performance on the two platforms may differ.

Below is presented a picture of SDP-B Controller Board with the EVAL-CN0150A-SDPZ Evaluation Board.

The CN0150 circuit measures RF power at any frequency from 1 MHz to 8 GHz over a range of approximately 60 dB. The measurement result is provided as a digital code at the output of a 12-bit ADC with serial interface and integrated reference. The output of the RF detector has a glueless interface to the ADC and uses most of the ADC’s input range without further adjustment. A simple two-point system calibration is performed in the digital domain.

The AD8318 maintains accurate log conformance for signals of 1 MHz to 6 GHz and provides useful operation to 8 GHz. The device provides a typical output voltage temperature stability of ±0.5 dB.

The AD7887 ADC can be configured for either dual or single channel operation via the on-chip control register. There is a default single-channel mode that allows the AD7887 to be operated as a read-only ADC, thereby simplifying the control logic.

The EVAL-CN0150A-SDPZ board contains the circuit to be evaluated, as described in this note. To power the EVAL-CN0150A-SDPZ evaluation board supply +6V between the +6 V and GND inputs.

More information

Getting Started

The first objective is to ensure that you have all of the items needed and to install the software tools so that you are ready to create and run the evaluation project.

Required Hardware

Required Software

  • Xilinx ISE 14.6.
  • UART Terminal (Termite/Tera Term/Hyperterminal), baud rate 115200.
  • The EVAL-CN0150 reference project for Xilinx KC705 FPGA.

Downloads

Run the Demonstration Project

Hardware setup


Before connecting the ADI evaluation board to the Xilinx KC705 make sure that the VADJ_FPGA voltage of the KC705 is set to 3.3V. For more details on how to change the setting for VADJ_FPGA visit the Xilinx KC705 product page.

  • Use the FMC-SDP interposer to connect the ADI evaluation board to the Xilinx KC705 board on the FMC LPC connector.
  • Connect the JTAG and UART cables to the KC705 and power up the FPGA board.

Reference Project Overview

The following commands were implemented in this version of EVAL-CN0150 reference project for Xilinx KC705 FPGA board.

Command Description
help? Displays all available commands.
calibration= Makes a two points calibration. Accepted values:
power input1:
-50 .. -5 - first point input power in [dBm].
power input2:
-50 .. -5 - second point input power in [dBm].
pinCalc? Displays the calculated input power in [dBm].
error? Displays the error associated with the last input power calculation. Accepted values:
-50 .. -5 - true input power in [dBm].

Commands can be executed using a serial terminal connected to the UART peripheral of Xilinx KC705 FPGA.

The following image shows a generic list of commands in a serial terminal connected to Xilinx KC705 FPGA's UART peripheral. terminal_kc705.jpg

Software Project Setup

The hardware platform for each reference projects with FMC-SDP interposer and KC705 evaluation board is common. The next steps should be followed to recreate the software project of the reference design:

Github Repository

  • From this entire repository you will use cf_sdp_kc705 folder. This is common for all KC705 projects.

EDK KC705 project

  • Open the Xilinx SDK. When the SDK starts, it asks you to provide a folder where to store the workspace. Any folder can be provided. Make sure that the path where it is located does not contain any spaces.
  • In the SDK select the File→Import menu option to import the software projects into the workspace.

Import Projects

  • In the Import window select the General→Existing Projects into Workspace option.

Existing Projects Import

  • In the Import Projects window select the cf_sdp_kc705 folder as root directory and check the Copy projects into workspace option. After the root directory is chosen the projects that reside in that directory will appear in the Projects list. Press Finish to finalize the import process.

Projects Import

  • The Project Explorer window now shows the projects that exist in the workspace without software files.

Project Explorer

  • Now the software must be added in your project. For downloading the software, you must use 3 links from Github given in Downloads section. From there you'll download the specific driver, the specific commands and the Xilinx Boards Common Drivers(which are commons for all Xilinx boards). All the software files downloaded must be copied in src folder from sw folder.

Project complete

  • Before compilation in the file called Communication.h you have to uncomment the name of the device that you currently use. In the picture below there is an example of this, which works only with AD5629R project. For another device, uncomment only the respective name. You can have one driver working on multiple devices, so the drivers's name and the uncommented name may not be the same for every project.

Communication.h

  • The SDK should automatically build the project and the Console window will display the result of the build. If the build is not done automatically, select the Project→Build Automatically menu option.
  • If the project was built without any errors, you can program the FPGA and run the software application.
13 Aug 2013 09:22 · Lucian Sin

More information

28 May 2012 15:18