Connecting to Pluto over JTAG requires a standard JTAG programmer from Xilinx or a simplier solution like the JTAG-HS3+JTAGUART programmer. We will be using the JTAG-HS3+JTAGUART in this guide.
First, open up PlutoSDR's case and locate the JTAG_BOOT connector holes on the bottom left portion of the PCB. Using an 8 pin ribbon cable from your JTAG programmer connect to those pins as shown in the figure below.
After the JTAG programmer is connected, provide power to PlutoSDR using either of its USB connectors. Once powered the D5 led should illuminate to signal the JTAG connection to the programmer is alive. This will appear like the figure below.
Next we can go into vivado and check the hardware manager for connectivity. This can be done with xsct as follows:
tcollins@winston:/tmp$ xsct rlwrap: warning: your $TERM is 'xterm' but rlwrap couldn't find it in the terminfo database. Expect some problems. ****** Xilinx Software Commandline Tool (XSCT) v2017.4.1 **** Build date : Jan 30 2018-15:42:35 ** Copyright 1986-2017 Xilinx, Inc. All Rights Reserved. xsct% connect -host localhost -port 3121 tcfchan#0 xsct% targets 1 APU 2 ARM Cortex-A9 MPCore #0 (Running) 3 ARM Cortex-A9 MPCore #1 (Running) 4 xc7z010 xsct%
If for some reason PlutoSDR does not boot, if the firmware update failed for example, the device will appear in DFU mode (1 solid LED and no blinking LED) but not actually boot into DFU. This happens when u-boot or the FSBL is corrupted. This is unlikely but can happen. To fix this you can leverage the JTAG bootstrap zip part of each release. To do so perform the following: