# Analog Devices Wiki

This version (21 Jan 2020 15:24) was approved by shoo.teu.The Previously approved version (21 Jan 2020 15:22) is available. # Activity: Tuned Amplifier Stages

## Objective:

The objective of this lab activity is to study the characteristics of tuned amplifiers stages as covered in Chapter sections 16.4 and 16.5 of the on-line Introduction to Electronics text.

## Background:

Many communications system requirements exceed the high-frequency limits of op-amps. In cases such as these, discrete tuned amplifiers are often used. Discrete amplifiers are typically tuned using LC (parallel inductor-capacitor) resonant circuits in place of the collector (or drain) resistors. One such circuit is shown in figure 1.

Figure 1 Common emitter amplifier with resonate output load

The parallel LC (resonate tank) circuit determines the frequency response of the amplifier. There is a frequency at which XL = XC. This frequency, called the resonant frequency FR, is calculated using:

As we learned in the lab on inductor self resonance it is important to take this built-in capacitance into account when designing tuned amplifiers. In an ideal resonant circuit, inductor current lags the capacitor current by 180º and the net circuit current is zero. As a result: The impedance of a parallel resonant circuit is extremely high at FR. The common emitter amplifier voltage gain reaches its maximum value when the collector load impedance is maximum i.e. operated at FR.

When the input frequency (FIN) is lower than FR, the circuit impedance decreases from its maximum value, and is inductive. When FIN is higher than FR, the circuit impedance drops again, but is capacitive. When operated at FR, the impedance of the tank circuit reaches its maximum value. As a result, the gain of the tuned common emitter amplifier is also at its maximum value.

### Pre Lab Simulations

Build a simulation schematic of the tuned amplifier as shown in figure 1. Calculate values for bias resistors R1 and R2 such that with emitter resistor R3set to 100 Ω, the collector current in NPN transistor Q1 is approximately 5 mA. Assume the circuit is powered from a +10V power supply. Be sure to keep the sum of R1 and R2 ( total resistance ) as high as practical to maintain the input impedance of the amplifier stage as high as possible. Set input and output AC coupling capacitors C2 and C3 to 0.1 uF. Calculate a value for C1 such that the resonate frequency, with L1 set equal to 100 uH, will be close to 500 KHz. Perform a small signal AC sweep of the input and plot the amplitude and phase seen at the output. Save these results to compare with the measurements you take on the actual circuit and to include with your lab report. You may also want to create simulation schematics for the circuits shown in figures 3 and 4 as well.

### Materials:

Solder-less breadboard, and jumper wire kit
1 - 2N3904 NPN transistor
1 - 100 uH inductor (Various other value inductors)
2 - 0.1 uF capacitors ( marked 104 )
1 - 100 Ω resistor
Other resistor and capacitors as needed

### Directions:

Build the circuit shown in figure 2 on your solder-less breadboard. Based on your pre lab simulations pick values for bias resistors R1 and R2 from your parts kit such that with the 100 Ω emitter resistor, R3, the collector current in NPN transistor Q1 is between 5 mA and 10 mA. Assume the circuit is powered from the +5V and -5V power supplies ( 10 V total ). Be sure to keep the sum of R1 and R2 ( total resistance ) as high as practical to maintain the input impedance of the amplifier stage as high as possible. Again based on your simulations, calculate a value for C1 such that the resonate frequency with the 100 uH L1 will be close to 500 KHz. Pick a standard capacitor value from the ones supplied in your parts kit or combine two in series or parallel to come as close as possible to your calculated value. Calculate a new resonate frequency based on the final value you ended up with for C1. You may want to include the effect of the parasitic winding capacitance you might have measured in the lab on inductor self resonance.

The peak gain of this tuned amplifier can be very high. We will need to slightly attenuate the output signal of AWG1 by picking a value for RS that is 2 to 3 times larger than the parallel combination of R1 and R2 ( the input resistance of the amplifier). The value of the output load, RL, also determines the amplifier maximum gain. For the initial measurements leave RL out of the circuit. The approximate 1 MegΩ input resistance of the scope channel will serve as RL.

Figure 2 Common emitter tuned amplifier

### Hardware Setup:

The green squares indicate where to connect the ADALM2000 module AWG, scope channels and power supplies. Be sure to turn on the power supplies only after you double check your wiring. Figure 3 Common emitter tuned amplifier breadboard connections

### Procedure:

Open the network analyzer software instrument from the main Scopy window. Configure the sweep to start at 10 KHz and stop at 10 MHz. Set the Amplitude to 200 mV and the Offset to zero volts. Under the Bode scale set the magnitude top to 60 dB and range to 80 dB. Set the phase top to 180º and range to 360º. Under scope channels click on use channel 1 as reference. Set the number of steps to 100.

Run a single frequency sweep. You should see amplitude and phase vs frequency plots that look very similar to your simulation results. Once you have determined that the maximum gain of the amplifier occurs near 500 KHz then you can reduce the frequency sweep range to start at 100 KHz and stop at 1 MHz. Be sure to export all the frequency sweep data to a .csv file for further analysis in either Excel or Matlab. Figure 4 Common emitter tuned amplifier with RL is 1MΩ

Now add the load resistor, RL, in the circuit. Start with 100 KΩ and run a new sweep. Note the maximum gain and the frequency. Compare to the result you got with just the scope input as the load. Try successively lower values for RL such as 10 KΩ and 1 KΩ etc. Note and compare your measurements.

### Questions:

What is the 3 dB bandwidth of the amplifier without RL?
What is the 3 dB bandwidth with RL equal to 100 KΩ, 10 KΩ and 1 KΩ?
What is the effect of connecting a capacitor in parallel ( across ) with emitter resistor R3?
Using the scope and function generator software instruments ( in the time domain ) what is the maximum peek to peek voltage swing possible at the output of the circuit? Be sure to measure it at the resonance frequency. What limits the positive and negative peak voltages? Can it be larger than the power supply voltage and why?

## Frequency Multipliers

Frequency Multipliers or harmonic generators are a special class of amplifiers that are biased at 3 to 10 times below normal cutoff bias. They are used to generate an output frequency that is a multiple (harmonic) of a lower input frequency.

The tuned amplifier circuit of figure 2 can operate as a frequency multiplier. If an input signal, such as a square wave or pulse that contains a large enough harmonic, has a frequency of say 167 KHz, which is 1/3 of the 500 KHz resonant frequency of the output tank, the output signal would contain mostly 500 KHz where the gain is highest, or three times the input frequency. The fundamental frequency and other harmonics of the input will be greatly reduced by the tuned nature of the circuit. The fifth harmonic (frequency quintupler) is normally as high in multiplication as is practical, because harmonics of an input signal higher than the fifth are generally very weak, and the multiplied output diminishes to a very weak signal.

### Directions:

Calculate new values for the input bias resistor divider R1, R2 such that transistor Q1 is nominally just cut off ( IC = 0 ) with no input signal applied. Sine waves generally do not contain any harmonics so set AWG1 to produce a square wave signal at 1/3 the resonate frequency you measured in the earlier tests. To generate large harmonics set the symmetry to 20% ( pulse high for 20% of the period). You will need to increase the amplitude of the input pulse to greater than 2 V or remove the input attenuation source resistor RS.

### Procedure:

Frequency multipliers are operated by the pulses of collector current produced by a class C amplifier. Although the collector current flows in pulses, the alternating collector voltage is sinusoidal because of the action of the tank circuit. Use one of the scope channels to monitor the collector current pulses by measuring the voltage across emitter resistor R3. Figure 5 CH 2, voltage across emitter resistor R3

## Improved Tuned Amplifier Stage

The following circuit, shown in figure 6 is a more versatile tuned amplifier stage using an NPN differential pair with an LC resonate output load.

### Materials:

Solder-less breadboard, and jumper wire kit
1 - 2N3904 NPN transistor
1 - SSM2212 NPN matched transistor pair
1 - 100 uH inductor (Various other value inductors)
2 - 0.1 uF capacitors ( marked 104 )
1 - 100 Ω resistor
2 - 1 KΩ resistors
1 - 2.2 KΩ resistor
Other resistor and capacitors as needed

### Directions:

Build the circuit shown in figure 3 on your solder-less breadboard. Use the SSM2212 matched transistor pair for Q1 and Q2. Pick values for bias resistors R1 and R2 from your parts kit such that with the 100 Ω emitter resistor, R3, the collector current in NPN transistor Q3 is between 5 mA and 10 mA. Note in this case the R1, R2 resistor divider is powered from ground and -5V power supply. Use the same combination of L1 and C1 as in the previous amplifier stage.

Figure 6 Differential amplifier stage with single ended resonate output load

### Hardware Setup:

The green squares indicate where to connect the ADALM2000 module AWG, scope channels and power supplies. Be sure to turn on the power supplies only after you double check your wiring. Figure 7 Differential amplifier stage with single ended resonate output load breadboard connection

### Procedure:

Open the network analyzer software instrument from the main Scopy window. Configure the sweep to start at 10 KHz and stop at 10 MHz. Set the Amplitude to 200 mV and the Offset to zero volts. Under the Bode scale set the magnitude top to 50 dB and range to 80 dB. Set the phase top to 180º and range to 360º. Under scope channels click on use channel 1 as reference. Set the number of steps to 500.

As in the first experiment, run a single frequency sweep. Once you have determined that the maximum gain of the amplifier occurs near 500 KHz then you can reduce the frequency sweep range to start at 100 KHz and stop at 1 MHz. Be sure to export the data to a .csv file for further analysis in either Excel or Matlab. Figure 8 Improved tuned amplifier with RL is 1MΩ

As before add the load resistor, RL, in the circuit. Start with 100 KΩ and run a new sweep. Note the maximum gain and the frequency. Compare to the result you got with just the scope input as the load. Try successively lower values for RL such as 10 KΩ and 1 KΩ etc. Note and compare your measurements. They should be very similar to the results you got in the first experiment.

### Bonus Experiment:

Amplitude modulation may be applied to the output frequency by capacitor coupling a modulating (audio frequency) signal from AWG 2 to either the base or emitter of current source transistor Q3.

## Adding a 2 pole high pass filter input stage

It is sometimes desirable to include a simple active high pass filter to the input of the single transistor tuned amplifier stage. The filter circuit shown in figure 4 provides a two pole filter with unity gain. This filter is convenient to place in a larger circuit because it contains few components and does not occupy much space.

The active high pass transistor circuit is quite straightforward, using just a total of four resistors, two capacitors and the same single transistor. The operating conditions for the transistor are set up in the normal way. As in figure 1, R1 and R2 are used to set up the bias point for the base of the transistor. The resistor R3 is the emitter resistor and sets the current for the transistor.

The filter components are included in negative feedback from the emitter of the transistor to the input. The components that form the active filter network consist of C2, C3, R4 and the combination of R1 and R2 in parallel, assuming that the input resistance to the base of the transistor is very high and can be ignored.  This is for values where the effect of the transistor itself within the high pass filter circuit can be ignored, i.e.:  Where:
β = the forward current gain of the transistor
Fo = the cut-off frequency of the high pass filter
π = equal to 3.14159

The equations for determining the component values provide a Butterworth response, which provides maximum flatness within the pass-band at the expense of achieving the ultimate roll off as quickly as possible. This has been chosen because this form of filter suits most applications and the mathematics works out easily.

### Materials:

Solder-less breadboard, and jumper wire kit
1 - 2N3904 NPN transistor
1 - 100 uH inductor (Various other value inductors)
1 - 0.1 uF capacitors ( marked 104 )
1 - 100 Ω resistor
Other resistor and capacitors as needed

### Directions:

Build the circuit shown in figure 4 on your solder-less breadboard. Use the same values for bias resistors R1 and R2 that you used in experiment 1 (figure 2). Use the same combination of L1 and C1 as in the previous amplifier stage. Using the formula above for the high pass cut off frequency FO, calculate values for C2, C3 and R4 that results in a frequency more than two octaves below the resonance frequency of L1 and C1. For example if FR is equal to 500 KHz then base your calculations on FO equal to 125 KHz.

Figure 9 Adding a 2 pole high pass input filter to the tuned amplifier

### Hardware Setup

The green squares indicate where to connect the ADALM2000 module AWG, scope channels and power supplies. Be sure to turn on the power supplies only after you double check your wiring. ### Procedure:

Open the network analyzer software instrument from the main Scopy window. Configure the sweep to start at 10 KHz and stop at 10 MHz. Set the Amplitude to 200 mV and the Offset to zero volts. Under the Bode scale set the magnitude top to 30 dB and range to 60 dB. Set the phase top to 180º and range to 360º. Under scope channels click on use channel 1 as reference. Set the number of steps to 100. Figure 11 Result with RL is 1MΩ

As in the first experiment, run a single frequency sweep with scope channel 2 connected through coupling capacitor C4 to the collector of Q1. To measure the response of the high pass input filter, connect scope channel 2 through coupling capacitor C4 to the base of Q1. Be sure to export the data to a .csv file for further analysis in either Excel or Matlab. Compare the response curves with what you measured for the circuit in figure 2. Try different combinations of values for C2, C3 and R4 to see how the frequency response changes.

Lab Resources: 