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university:courses:tutorials:cmos-dac-chapter [16 Sep 2014 16:46] – [1.3 SEGMENTED DACS] Doug Merceruniversity:courses:tutorials:cmos-dac-chapter [21 Jan 2021 16:09] (current) – [2.11 CONCLUSIONS] Doug Mercer
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 A number of major contributors to errors and distortion in modern switched current DACs have been discussed. Static device matching can be addressed either though statistical averaging or calibration. One or more cascodes can be included, along with insuring that the output switches remain in saturation, to reduce the effect of output impedance variation. The importance of gate drive signals was explored. Much like the flash ADC, clock distribution is a key factor. Digital data pattern generated noise needs to be addressed and the effect on clock noise can be a major source of distortion. Return-to-zero switching can be employed to retime the output sampling time. The use of a quad switch and constant data activity switching techniques can shift spurious outputs to the sampling frequency. A number of major contributors to errors and distortion in modern switched current DACs have been discussed. Static device matching can be addressed either though statistical averaging or calibration. One or more cascodes can be included, along with insuring that the output switches remain in saturation, to reduce the effect of output impedance variation. The importance of gate drive signals was explored. Much like the flash ADC, clock distribution is a key factor. Digital data pattern generated noise needs to be addressed and the effect on clock noise can be a major source of distortion. Return-to-zero switching can be employed to retime the output sampling time. The use of a quad switch and constant data activity switching techniques can shift spurious outputs to the sampling frequency.
  
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university/courses/tutorials/cmos-dac-chapter.txt · Last modified: 21 Jan 2021 16:09 by Doug Mercer