The objective of this Lab activity is to investigate the band-gap voltage reference.
The principal behind the band-gap voltage reference is to sum a voltage which is proportional to absolute temperature (PTAT) with a voltage that has an equal but opposite ( complementary) negative temperature drift (CTAT) to produce a voltage which has effectively zero temperature drift. The zero gain amplifier and stabilized current source combination produces a PTAT current at its output. This current will produce a PTAT voltage when flowing through a resistor. The VBE of a BJT has a well defined negative temperature drift which when summed with a properly scaled PTAT voltage will result in a near zero drift output voltage. This combined voltage is approximately 1.2 Volts which is very nearly the band-gap voltage of silicon hence the name.
In the first version shown in figure 1, A PTAT current source (Q1, Q2A,B, R2) can be used in conjunction with a PNP current mirror stage (Q3,Q4A,B) in negative feedback to build a circuit which provides an output voltage which is the sum of a PTAT voltage (R1) and the VBE of Q1 which is constant or regulated over a range of input voltages and over temperature. There is a problem with the circuit in version 1. The current available to an output load is limited by the feedback current supplied from NPN Q2 mirrored through PNPs Q3 and Q4. Any current that is diverted into an external load would reduce the current in R1 and change the scaling of the PTAT voltage with respect to the voltage of the VBE. It would be desirable to build a circuit which provides a constant or regulated output voltage over not only a range of input voltages but also output load currents. A second circuit, shown in figure 2 utilizes an emitter follower output stage to provide the current to the output.
Analog Discovery Lab hardware
1 - 2.2 KΩ Resistor ( or any similar value )
1 - 100 Ω resistor
3 - small signal NPN transistors (2N3904 or SSM2212)
3 - small signal PNP transistors (2N3906 or SSM2220)
The breadboard connections are as shown in the diagram below. The output of the AWG1 serves as the positive power supply and drives the emitters of both PNP transistors Q3 and Q4A,B. Q3 and Q4A,B are wired as a gain of two current mirror with their bases connected together with the collector of Q3. The collector of Q4A,B connects to resistor R1. Resistors R1, R2 and transistor Q1 are connected as a zero gain amplifier section. The VBE of the two parallel connected transistors Q2,A,B is smaller than the VBE of Q1 by the voltage drop across R2. The base of transistor Q2A,B is connected to the zero gain output at the collector of Q1. The collector of Q2 connects to the input side of the PNP current mirror at the base - collector of Q3. The channel 2+ (Single Ended) scope input is used to measure the output voltage at the collector of Q4.
Figure 1 Voltage reference, Version 1
Waveform generator 1 should be configured for a 1 KHz triangle wave with 2 volt amplitude and 2V offset. The Single ended input of scope channel 2 (2+) is used to measure the stabilized output voltage at the collector of Q4.
Plot the output voltage (as measured at the collector of Q4) vs. the input voltage. At what input voltage level does the output voltage stop changing i.e. regulate? This is called the “drop out” voltage. For input voltages above the drop out voltage, how much does the output voltage change for each volt of change at the input? The change in Vout / change in Vin is called line regulation. Connect a variable resistor from the output node to ground. With the input voltage fixed (i.e. connected to the fixed Vp board power supply), measure the output voltage for various settings of the resistor. Calculate the current in the resistor for each setting. How does the output voltage vary vs. output current? This is called load regulation.
Looking at the circuit in figure 2 we see many of the same basic components from figure 1. Q1,Q2, R1 and R2 serve the same basic functions as before. However rather than use the PNP current mirror to provide negative feedback to regulate the circuit, a common emitter amplifier consisting of Q3 and R4 driving emitter follower Q4 closes the feedback to the top of resistor R3. The output voltage will be the sum of a PTAT voltage across R3 and the VBE of Q3. Emitter follower Q4 supplies any varying load current that might be taken from the output node.
1 - 2.2 KΩ Resistor
1 - 100 Ω resistor
1 - 10 KΩ variable resistor (potentiometer)
1 - 4.7 KΩ resistor
1 - 1.0 nF capacitor (102)
(resistors can be any similar value selected for desired circuit operation)
4 - small signal NPN transistors (2N3904, SSM2212, CA3045)
The breadboard connections are as shown in figure 2. As before transistor Q1 and resistors R1 and R2 are configured as a zero gain amplifier. Transistor Q2 and variable resistor R3form a stabilized PTAT current source. If the SSM2212 matched NPN pair is used it is best that it be used for devices Q1 and Q2. Common emitter stage Q3 along with its collector load R4 provide gain. Emitter follower Q4 drives the output node and closes the negative feedback loop.
Figure 2 Regulator Version 2
Waveform generator W1 should be configured for a 1 KHz triangle wave with 2 volt amplitude and 2V offset. Scope channel 2 (2+) is used to measure the stabilized output voltage at the emitter of Q4.
Repeat the drop out voltage, line and load regulation measurements for this circuit. How are they different than the Version 1 regulator circuit?
In the Version 1 circuit the net effective emitter ratio between Q1 and Q2 is four ( 2:1 for the NPNs and 2:1 in the PNP current mirror). How would the value for R1 need to change if the combined ratio was reduced to 2:1 by removing one or the other of the parallel transistors, Q2B or Q4B? Would the circuit still function if the NPN and PNP emitter ratios were both 1:1?
For Further Reading:
Return to Lab Activity Table of Contents.
The CA3045,46 ( LM3045, 46 ) NPN transistor array is a good alternate choice for building this example circuit. See pinout below.
All the emitters can be tired to ground ( pins 3,7,10,13 ). Devices Q1, Q2 and Q3 can be connected in parallel and serve as Q2 in figure 2. Q4 and Q5can be used for Q1 and Q3in figure 2. An individual device such as a 2N3904 etc. can be used for Q4 in figure 2. The 3 to 1 emitter area ratio will result in an output voltage very nearly 1.2 volts if R1 and R3 are both equal to 2K? (when R2 is 100?).