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university:courses:electronics:text:chapter-9 [26 Feb 2017 13:48] – [9.7.2 BJT Version DC Biasing techniques] Jack Liuuniversity:courses:electronics:text:chapter-9 [03 May 2019 16:33] – [9.5.4 DC Biasing techniques with emitter/source degeneration] Doug Mercer
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 ====9.2.5 common emitter and source Lab Activities==== ====9.2.5 common emitter and source Lab Activities====
  
-[[university:courses:electronics:electronics-lab-5|Common emitter amplifier]]\\ +**ADALM1000 Lab Activity 5, [[university:courses:alm1k:alm-lab-5|Common emitter amplifier]]**\\ 
-[[university:courses:electronics:electronics-lab-5m|Common source amplifier]]\\ +**ADALM1000 Lab Activity 5M, [[university:courses:alm1k:alm-lab-5m|Common source amplifier]]** 
-[[university:courses:electronics:electronics-lab-5fr|Amplifier Frequency Response]]+ 
 +**ADALM2000 Lab Activity 5, [[university:courses:electronics:electronics-lab-5|Common emitter amplifier]]**\\ 
 +**ADALM2000 Lab Activity 5M, [[university:courses:electronics:electronics-lab-5m|Common source amplifier]]**\\ 
 +**ADALM2000 Lab Activity 5FR, [[university:courses:electronics:electronics-lab-5fr|Amplifier Frequency Response]]**
  
 =====9.3 The Current Follower also known as Common base or gate amplifier===== =====9.3 The Current Follower also known as Common base or gate amplifier=====
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 Again looking at the small signal models in figure 9.3.1 we see that for both the BJT case and the MOS case the output impedance is the parallel combination of R<sub>L</sub> and r<sub>o</sub>. We can generally assume this is true if we consider that V<sub>in</sub> is driven from a low impedance (nearly ideal) voltage source. If this is not the case then the finite output impedance must be added in series with r<sub>o</sub>. If the input of the current follower is driven by the relatively high output impedance of a transconductance amplifier such as the common emitter or source amplifier from earlier then the output impedance for the combined amplifier can be very high. For most practical applications we can ignore r<sub>o</sub> because it is very often much larger than R<sub>L</sub> Again looking at the small signal models in figure 9.3.1 we see that for both the BJT case and the MOS case the output impedance is the parallel combination of R<sub>L</sub> and r<sub>o</sub>. We can generally assume this is true if we consider that V<sub>in</sub> is driven from a low impedance (nearly ideal) voltage source. If this is not the case then the finite output impedance must be added in series with r<sub>o</sub>. If the input of the current follower is driven by the relatively high output impedance of a transconductance amplifier such as the common emitter or source amplifier from earlier then the output impedance for the combined amplifier can be very high. For most practical applications we can ignore r<sub>o</sub> because it is very often much larger than R<sub>L</sub>
  
 +**ADALM1000 Lab Activity, [[university:courses:alm1k:alm-lab-cb|BJT Common Base Amplifier]]**\\
 +**ADALM1000 Lab Activity, [[university:courses:alm1k:alm-lab-cg|BJT Common Gate Amplifier]]**\\
 +**ADALM1000 Lab Activity, [[university:courses:alm1k:alm-lab-fca|Folded Cascode Amplifier]]**
 ==== 9.4 Voltage followers (also called Emitter or Source follower or Common collector or drain amplifiers) ==== ==== 9.4 Voltage followers (also called Emitter or Source follower or Common collector or drain amplifiers) ====
  
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 ====9.4.5 Voltage Follower (common collector or drain) Lab Activities ==== ====9.4.5 Voltage Follower (common collector or drain) Lab Activities ====
  
-[[university:courses:electronics:electronics-lab-11|BJT Emitter follower]]\\ +**ADALM1000 Lab Activity 11, [[university:courses:alm1k:alm-lab-11|BJT Emitter follower]]**\\ 
-[[university:courses:electronics:electronics-lab-11m|MOS source follower]]\\+**ADALM1000 Lab Activity 11M, [[university:courses:alm1k:alm-lab-11m|MOS Source follower]]**
  
 +**ADALM2000 Lab Activity 11, [[university:courses:electronics:electronics-lab-11|BJT Emitter follower]]**\\
 +**ADALM2000 Lab Activity 11m, [[university:courses:electronics:electronics-lab-11m|MOS Source follower]]**
  
 =====9.5 Series Feedback: emitter/source degeneration===== =====9.5 Series Feedback: emitter/source degeneration=====
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 The impedance R<sub>E</sub> reduces the overall transconductance g<sub>m</sub> of the circuit by a factor of g<sub>m</sub>R<sub>E</sub> + 1, which makes the voltage gain: The impedance R<sub>E</sub> reduces the overall transconductance g<sub>m</sub> of the circuit by a factor of g<sub>m</sub>R<sub>E</sub> + 1, which makes the voltage gain:
  
- +{{ :university:courses:electronics:text:chptr9-e17.png?290 |}}
-{{ :university:courses:electronics:text:chptr9-e17.png?300 |}}+
 (when g<sub>m</sub>R<sub>E</sub> >> 1) (when g<sub>m</sub>R<sub>E</sub> >> 1)
  
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 Going back to our earlier biasing example, figure 9.5.1, values for I<sub>C</sub> = 2mA, R<sub>L</sub> = 3.4KΩ and R<sub>E</sub> = 3KΩ to calculate the small signal gain we first find g<sub>m</sub> = I<sub>C</sub>/V<sub>T</sub> = 2mA/25mV = 0.08. Using our formula for A<sub>V</sub>: Going back to our earlier biasing example, figure 9.5.1, values for I<sub>C</sub> = 2mA, R<sub>L</sub> = 3.4KΩ and R<sub>E</sub> = 3KΩ to calculate the small signal gain we first find g<sub>m</sub> = I<sub>C</sub>/V<sub>T</sub> = 2mA/25mV = 0.08. Using our formula for A<sub>V</sub>:
  
-{{ :university:courses:electronics:text:chptr9-e18.png?400 |}}+{{ :university:courses:electronics:text:chptr9-e18.png?300 |}}
  
 ====9.5.2 Small signal input impedance with emitter/source degeneration==== ====9.5.2 Small signal input impedance with emitter/source degeneration====
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 Again looking at the small signal models in figure 9.4.1 we see that for the BJT case the input V<sub>in</sub> see r<sub></sub>in series with degeneration resistor R<sub>E</sub> as a load. For the MOS case V<sub>in</sub> see basically an open circuit. Again looking at the small signal models in figure 9.4.1 we see that for the BJT case the input V<sub>in</sub> see r<sub></sub>in series with degeneration resistor R<sub>E</sub> as a load. For the MOS case V<sub>in</sub> see basically an open circuit.
  
-{{ :university:courses:electronics:text:chptr9-e21.png?200 |}}+{{ :university:courses:electronics:text:chptr9-e19.png?200 |}}
  
 ====9.5.3 Small signal output impedance with emitter/source degeneration==== ====9.5.3 Small signal output impedance with emitter/source degeneration====
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 Using our earlier biasing exercise in figure 9.5.1 as an example but splitting the 3KΩ R<sub>E</sub> into two resistors as in figure 9.5.4 with R<sub>E1</sub>= 1KΩ and R<sub>E2</sub> = 2KΩ with C<sub>1</sub> = 1uF we can recalculate the small signal gain for high frequencies, where C<sub>1</sub> effectively shorts out R<sub>E2</sub>, to be: Using our earlier biasing exercise in figure 9.5.1 as an example but splitting the 3KΩ R<sub>E</sub> into two resistors as in figure 9.5.4 with R<sub>E1</sub>= 1KΩ and R<sub>E2</sub> = 2KΩ with C<sub>1</sub> = 1uF we can recalculate the small signal gain for high frequencies, where C<sub>1</sub> effectively shorts out R<sub>E2</sub>, to be:
  
-{{ :university:courses:electronics:text:chptr9-e22.png?200 |}}+{{ :university:courses:electronics:text:chptr9-e20.png?300 |}}
  
 The addition of by-pass capacitor C<sub>1</sub>, however, modifies the low frequency response of the circuit. We know from our two gain calculations that the DC gain of the circuit is -1.13 and the gain increases to -3.36 for high frequencies. We can therefore assume that the frequency response consists of a relatively low frequency zero followed by a somewhat higher frequency pole. The formulas for the zero and pole are as follows: The addition of by-pass capacitor C<sub>1</sub>, however, modifies the low frequency response of the circuit. We know from our two gain calculations that the DC gain of the circuit is -1.13 and the gain increases to -3.36 for high frequencies. We can therefore assume that the frequency response consists of a relatively low frequency zero followed by a somewhat higher frequency pole. The formulas for the zero and pole are as follows:
  
-<m> F_Z = 1/(2πR_E2 C_1) </m>+<m>F_Z = 1/(2 pi R_E2 C_1)</m>
  
-<m> F_P = 1/(2R'_E C_1) </m>+<m>F_P = 1/(2R prime _E C_1)</m>
  
 where R’<sub>E</sub>= R<sub>E2</sub> || (R<sub>E1</sub> + r<sub>e</sub>) where R’<sub>E</sub>= R<sub>E2</sub> || (R<sub>E1</sub> + r<sub>e</sub>)
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 <m> I_b = (V_+ - V_BE ) / (R_F + (β + 1 )R_L ) </m> <m> I_b = (V_+ - V_BE ) / (R_F + (β + 1 )R_L ) </m>
- 
-{{ :university:courses:electronics:text:chptr9-e23.png?200 |}} 
  
 If V<sub>BE</sub> is held constant and temperature increases, then the collector current I<sub>c</sub> increases. However, a larger I<sub>c</sub> causes the voltage drop across resistor R<sub>L</sub> to increase, which in turn reduces the voltage V<sub>RF</sub> across the base resistor R<sub>F</sub>. A lower base-resistor voltage drop reduces the base current I<sub>b</sub>, which results in less collector current I<sub>c</sub>. Because an increase in collector current with temperature is opposed, the operating point is kept more stable. If V<sub>BE</sub> is held constant and temperature increases, then the collector current I<sub>c</sub> increases. However, a larger I<sub>c</sub> causes the voltage drop across resistor R<sub>L</sub> to increase, which in turn reduces the voltage V<sub>RF</sub> across the base resistor R<sub>F</sub>. A lower base-resistor voltage drop reduces the base current I<sub>b</sub>, which results in less collector current I<sub>c</sub>. Because an increase in collector current with temperature is opposed, the operating point is kept more stable.
university/courses/electronics/text/chapter-9.txt · Last modified: 07 Oct 2020 16:37 by Doug Mercer