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university:courses:electronics:open_loop_boost_and_buck [29 Jan 2020 04:39] – [Activity 4: Discontinuous Conduction Mode] Fix 50% duty cycle figure Mark Thoren | university:courses:electronics:open_loop_boost_and_buck [09 Mar 2020 18:26] (current) – Fix link Mark Thoren | ||
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====== Activity: Boost and Buck converter elements and open-loop operation ====== | ====== Activity: Boost and Buck converter elements and open-loop operation ====== | ||
- | ===== Objective: ===== | + | **MOVED to:**\\ |
- | + | [[university: | |
- | The objective of this activity is to explore some of the basic circuit blocks typically used in buck and boost converters. We'll operate these blocks to the point where they are " | + | |
- | + | ||
- | ==== Materials ==== | + | |
- | | + | |
- | | + | |
- | * Two digital multimeters OR: | + | |
- | | + | |
- | | + | |
- | * User Guide: | + | |
- | * CN0508-RPIZ power supply OR: | + | |
- | * 0-12V, 3A Adjustable benchtop power supply | + | |
- | ===== Background ===== | + | |
- | The [[university: | + | |
- | + | ||
- | {{ : | + | |
- | <WRAP centeralign> | + | |
- | + | ||
- | A simple expression for output voltage as a function of input voltage | + | |
- | + | ||
- | < | + | |
- | + | ||
- | This is followed by circuit construction, | + | |
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- | This exercise will expand on those concepts, deriving a converter that " | + | |
- | + | ||
- | ===== Activity 1: An Ideal* Open-Loop Boost Converter Simulation ===== | + | |
- | + | ||
- | * (This exercise will use the term " | + | |
- | + | ||
- | Open the Boost_Concept.asc LTSpice file. Notice the differences between this circuit and the buck converter: | + | |
- | * One side of the inductor is connected directly to the input supply. | + | |
- | * The switches are rearranged, with S1 allowing the input supply to be connected directly across the inductor, and S2 allowing the inductor to be connected or disconnected from the output. | + | |
- | As with the buck basics lab, let's keep two things in mind at all times: | + | |
- | * Current through an inductor can't change instantaneously | + | |
- | * The DC voltage across an inductor is zero | + | |
- | The figure below shows the " | + | |
- | + | ||
- | {{ : | + | |
- | <WRAP centeralign> | + | |
- | + | ||
- | When S1 closes, the left-hand side of the inductor is connected to the 5V supply, and the right-hand side is connected to ground. This means the voltage across the inductor is simply the 5V supply. This " | + | |
- | + | ||
- | < | + | |
- | + | ||
- | Note: The polarity of the voltage across the inductor is arbitrary, we're using the convention that a **positive** voltage is one that causes an **increase** in energy stored in the inductor. | + | |
- | + | ||
- | The next figure shows the other state, with S1 open and S2 closed. | + | |
- | + | ||
- | {{ : | + | |
- | <WRAP centeralign> | + | |
- | + | ||
- | When S2 closes, the left-hand side of inductor L1 is still connected to Vin, while the right-hand side is now connected to Vout. The current through L1 is now flowing to the output, and decreasing with a negative slope of: | + | |
- | < | + | |
- | + | ||
- | Similar to the buck converter basics activity 1 the “freq” and “duty” parameters set the frequency of the switching to 25kHz and the duty cycle of the voltages imposed on this switch node (sw_node) to 50%. That is, the righthand side of the inductor spends half of the time connected to ground (charging phase), and half of the time connected to the output (discharging phase). Run the simulation, and probe sw_node, Vout, and the current through inductor L1. Zoom in toward the end of the run after the startup transient damps out (after 8ms). (You can right-click, | + | |
- | + | ||
- | {{ : | + | |
- | <WRAP centeralign> | + | |
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- | Observe the peak and valley of the waveform I(L1) (green waveform), noting the current ripple. Using the cursors from peak to peak, we can observe that the inductor is charging and discharging linearly (with the period of 1/25kHz, or 40us, with a duty cycle of 50% making ts1 and ts2 20us each). | + | |
- | + | ||
- | The output voltage is almost exactly 10V - double the input voltage - with a small ripple imposed. Verify that the previously solved equations are true, using the cursors to measure the inductor current waveforms. | + | |
- | + | ||
- | For the " | + | |
- | < | + | |
- | And for the " | + | |
- | < | + | |
- | + | ||
- | Revisiting the concept of zero DC across an inductor, how can we find the output voltage of a boost converter knowing the input voltage, frequency, and duty cycle? “Zero DC across an inductor” means that over a long period of time, the average volt-second product is zero. Thus: | + | |
- | + | ||
- | < | + | |
- | + | ||
- | Where tS1 is the time that S1 is closed, tS2 is the time that S2 is closed. Rearranging, | + | |
- | < | + | |
- | Note that | + | |
- | < | + | |
- | is the duty cycle of the switch node, we can rewrite the expression for V< | + | |
- | < | + | |
- | + | ||
- | Since our duty cycle is based off ts1 and ts2, and the duty cycle is always between 0% and 100%, the above equation demonstrates that the average output voltage is always equal or larger than the input voltage, a basic property of a boost converter, and at a 50% duty cycle, the output voltage is double the input voltage. | + | |
- | + | ||
- | Now change the duty cycle in the simulation and re-run. The following are screenshots show the output voltage at 20% duty cycle(expected output of 6.25V) and 80% duty cycle(expected output of 25V). | + | |
- | + | ||
- | {{ : | + | |
- | <WRAP centeralign> | + | |
- | + | ||
- | {{ : | + | |
- | <WRAP centeralign> | + | |
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- | Can you boost to an arbitrarily high voltage? See Appendix: " | + | |
- | + | ||
- | ==== Load Regulation ==== | + | |
- | So far we've operated the boost circuit unloaded. In this condition, the duty cycle to boost factor relationships held true, but what happens if you start to draw current from the output (as you would in a practical circuit - after all, a power supply exists to power stuff!) Furthermore, | + | |
- | + | ||
- | Next, connect the 25 ohm load resistor to the output node (drawing an average current of 0.4 amps from the 10V output). Note that the impact on the output voltage is minimal, and the inductor current is still ramping up and down with the same peak-to-peak ripple, however the current is now always positive (flowing from input to output, according to our convention.) | + | |
- | + | ||
- | {{ : | + | |
- | <WRAP centeralign> | + | |
- | + | ||
- | But are we still FORCING this circuit to conduct continuously? | + | |
- | + | ||
- | ===== Activity 2: A real Open-Loop Boost Converter ===== | + | |
- | Open OL_Boost_concept_actual.asc in LTspice (see Figure 8). This simulation is a close approximation of the ADALM-SR1 configured for this mode. | + | |
- | + | ||
- | {{ : | + | |
- | <WRAP centeralign> | + | |
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- | Note that the simulation includes some of the non-ideal aspects of the real-world circuit: | + | |
- | + | ||
- | * Replace the ideal diode with a real diode, a MBRS340 (which is a close variant of the MBRA340 on the SR1) | + | |
- | * Add the series resistance of three windings of the Wurth '141 inductor. | + | |
- | * Replace the switch with an IRF7468 (close to the IRF7470 on the SR1) | + | |
- | * Add the 0.1Ω current sense resistors | + | |
- | * Add output capacitors, with ESR | + | |
- | + | ||
- | Note that this schematic still contains many simplifications - the gate driver is not shown, nor are the current sense amplifiers. And since the circuit is powered from an ideal voltage source (zero impedance), input capacitors can be eliminated. This will be a recurring theme, deciding what to simulate and what to assume is close enough to ideal that it can be eliminated from the simulation in the interest of speed, or in some cases, converging at all. The most obvious substitution is the replacement of the top switch with a diode. This will be discussed in more detail shortly, but for now, note that a diode is in fact a switch that conducts when the voltage at the anode is higher than the voltage at the cathode, and does not conduct when the polarity of the voltages are reversed.\\ | + | |
- | BEFORE APPLYING POWER... Configure the ADALM-SR1 board as shown in Figure 9 below: | + | |
- | * Duty Cycle: Manual | + | |
- | * Mode: Duty Cycle | + | |
- | * FET Sel: Boost | + | |
- | * Current Sense: High | + | |
- | * Current Threshold: Manual | + | |
- | * Inductance: 4 Taps | + | |
- | * Load Resistors: enable 2x200Ω, 100Ω, 50Ω (25Ω total) | + | |
- | + | ||
- | fix me: add missing load jumpers to figure | + | |
- | + | ||
- | {{ : | + | |
- | <WRAP centeralign> | + | |
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- | Set potentiometers to the following approximate settings: | + | |
- | + | ||
- | Frequency: 3:00 | + | |
- | Duty Cycle: 9:00 | + | |
- | Minimum On Time: 7:00 (fully counterclocwise) | + | |
- | Current Threshold: 3:00 | + | |
- | Voltage Feedback: 12:00 | + | |
- | + | ||
- | Set potentiometers to the following approximate settings: | + | |
- | * Frequency: 3:00 | + | |
- | * Duty Cycle: 9:00 | + | |
- | * Minimum On Time: 7:00 (fully counterclocwise) | + | |
- | * Current Threshold: 3:00 | + | |
- | * Voltage Feedback: 12:00 | + | |
- | + | ||
- | Connect a 5V, 1A USB power supply to the Auxiliary Power micro USB jack. At this point, the frequency and duty cycle can be fine-tuned by looking at the D0 signal in Scopy' | + | |
- | Ramp the Power Input to 5V and observe the current sense and switch node waveforms. | + | |
- | Note that Scopy' | + | |
- | Figures 10 and 11 show simulated vs. measured results, respectively, | + | |
- | + | ||
- | {{ : | + | |
- | <WRAP centeralign> | + | |
- | + | ||
- | {{ : | + | |
- | <WRAP centeralign> | + | |
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- | Next, increase the duty cycle to 50%. Figures 12 and 13 show simulated vs. measured results, respectively, | + | |
- | + | ||
- | {{ : | + | |
- | <WRAP centeralign> | + | |
- | + | ||
- | {{ : | + | |
- | <WRAP centeralign> | + | |
- | + | ||
- | ==== Going Further ==== | + | |
- | Try experimenting with the various load resistors and duty cycle potentiometer. The ADALM-SR1 does have a level of protection from stressful operating conditions: load and inductor overheating, | + | |
- | * Keep duty cycle under 50% | + | |
- | * Keep the input voltage at or below 5V | + | |
- | * Leave the frequency at 20kHz | + | |
- | + | ||
- | ===== Activity 3: Synchronous vs. Non-Synchronous Circuits ===== | + | |
- | (Describe in more detail why we replaced the top switch with a diode, simulation with an ideal diode, and show that it's equivalent to the synchronous circuit when operating in CCM.) | + | |
- | + | ||
- | ===== Activity 4: Discontinuous Conduction Mode ===== | + | |
- | With the circuit still configured as in Activity 2, reduce the output load by removing the 50Ω and 100Ω load resistor jumpers. You should notice the switch node and inductor current take on a drastically different shape. Figure X shows the switch node and inductor current at a 25% duty cycle. The output voltage jumps to 7.74V, HIGHER than the 6.67V predicted by the output voltage equation above (even with the drop of the boost diode and the IxR drop of the sense resistors and inductors.) | + | |
- | + | ||
- | {{ : | + | |
- | <WRAP centeralign> | + | |
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- | Figure X shows the switch node and inductor current at a 50% duty cycle. The output voltage is measured at 11.6V, again, higher than predicted. | + | |
- | + | ||
- | {{ : | + | |
- | <WRAP centeralign> | + | |
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- | This is a second mode of operation called " | + | |
- | + | ||
- | ===== Activity 5: An Open-Loop Buck Converter ===== | + | |
- | (Simulation and ADALM-SR1, no need to separate, buck basics lab handles the ideal case.) | + | |
- | + | ||
- | ===== Activity 6: Peak Current Control ===== | + | |
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- | ===== Conclusion ===== | + | |
- | This lab exercise detailed the "power path" for non-synchronous boost and buck converters, illustrating duty-cycle control and peak current control. These circuits would be practical by themselves in a well-controlled environment, | + | |
- | + | ||
- | ===== Appendix: Extreme Boosting ===== | + | |
- | Simulations at 99% duty cycle, and why high boost factors are almost never practical in real life. | + | |
- | + | ||
- | ===== Appendix: Current Sense Techniques ===== | + | |
- | The amazing LT1995... | + | |
- | + | ||
- | ===== Appendix: Gate Divers ===== | + | |
- | The MOSFETs in the LTspice simulations in this exercise are all either directly driven from a pulse voltage source, or by a voltage-controlled voltage source that "level shifts" | + | |
- | + | ||
- | Driving the gate of the low-side (boost) MOSFET seems like such a simple job - Ground the gate, and the MOSFET is off. If you measure the resistance from the gate to ground, the resistance is so high that it is likely that your meter will overrange (assuming the board is clean from flux or other contamination.) And the low threshold voltage of the IRF7470 makes it compatible with 5V logic-level signals. But there are subtleties to driving a MOSFET: Even the boost MOSFET can be tricky to drive - as the MOSFET is turning on, the gate-drain capacitance will draw significant current. And if for some reason the gate drive voltage is too low, due to a collapsing housekeeping supply for example, the MOSFET may not be driven fully on, resulting in excessive power dissipation. | + | |
- | The high side (buck) MOSFET is much trickier - the ground-referred gate control signal needs to be " | + | |
- | + | ||
- | ===== Appendix: Timing Generation ===== | + | |
- | Timing on the Switching Regulator Active Learning Module is generated by an LTC6992-3 pulse-width modulator and variable frequency oscillator. The frequency range is XX to YY, and the PWM duty cycle of the -3 variant extends from zero to 95%, never reaching 100%. This is a great device for generating timing signals for this board because it can be used both as pulse-width modulator and a clock. As a PWM generator, a simple 0-1V control signal to set the duty-cycle to 0-100% (clipped at 95% for the -3). To use the devices as a clock generator, simply set the duty cycle to 50% by setting the MOD pin to 0.5V. | + | |
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- | The -3 variant is used for two reasons: First, it limits the maximum boost factor, providing some redundancy to the overvoltage shutdown circuits. Second, the peak-current control circuit is still active in direct-duty-cycle control mode. This circuit requires clock edges in order to reset, and limiting the duty cycle to 95% ensures that edges occur. (A duty cycle of 100% is a signal that is always high, so there are no edges to reset the current limit.) | + | |
- | + | ||
- | Another point about the LTC6992 - the " | + | |
- | + | ||
- | {{ : | + | |
- | (borrowed from https:// | + | |
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- | Where POT1 produces the modulation signal. The LTC6992 is functionally very similar, with the exception that the response is not immediate - the modulation bandwidth is approximately 10kHz, roughly equivalent to placing a 10kHz, 1-pole filter at the output of POT1 in the figure above. As long as the loop bandwidth of the switching regulator is significantly lower than 10kHz (a safe assumption in most of our use cases), the impact is minimal. | + | |
- | + | ||
- | ===== Slide Deck ===== | + | |
- | A slide deck is provided as a companion to this exercise, and can be used to help in presenting this material in classroom, lab setting, or in hands-on workshops. | + | |
- | <WRAP round download> | + | |
- | (Insert slide deck here) | + | |
- | </ | + | |
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- | **Return to Lab Activity [[university: | + | |
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