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This version (03 Jan 2021 22:18) was approved by Robin Getz.The Previously approved version (06 May 2019 10:24) is available.Diff

Debugging I2C with the ADALM2000

Objective

The objective of this tutorial is to use the Logic Analyzer instrument provided by the ADALM2000 (M2K) board and the Scopy software toolset to visualize I2C (Inter-Integrated Circuit) transactions between two devices.

The ADT7420 PMOD Temperature Demo project will be used as an example. The project uses the EVAL-ADT7420-PMDZ connected to the EVAL-ADICUP360 microcontroller board. The PMOD includes the ADT7420 high accuracy digital temperature sensor.

The Demo application includes a function that reads and displays the temperature data from the ADT7420 and one that reads and displays the ID register data for ADT7420.

Background

I2C is a serial protocol for connecting low-speed peripheral integrated circuits like EEPROMs, A/D and D/A converters and other similar peripherals in embedded systems to processors and microcontrollers in short-distance (intra-board communication).

I2C supports multiple slave devices; a single master can communicate with one or more slaves, provided each slave is set to a unique address (this is either factory-programmed, or set through address pins on the device). Multiple masters are also supported through an arbitration scheme, useful, for example, when several microcontrollers require access to a single memory device.

Figure 1. I2C master-slave configuration

I2C physical layer signals:

  • SDA (Serial Data) – bidirectional data line for the master and slave to send and receive data
  • SCL (Serial Clock) – line that carries the clock signal, driven by the master

Being a serial communication protocol, I2C data is transferred bit by bit along a single wire (the SDA line). I2C is synchronous, meaning data transfer is synchronized by a clock signal driven by the master to one or more slaves. Both SDA and SCL are open-drain logic, requiring a pullup resistor (or active pullup circuit) to the bus's logic high level. Refer to the references at the end of this page for further details on the operation of the I2C bus.

Data is transferred in transactions composed of one or more 9-bit frames. Each transaction has an address frame that contains the binary address of the slave, and one or more data frames. The transaction also includes start and stop conditions, read/write bits, and ACK/NACK bits between each data frame as shown in Figure 2.

Figure 2. I2C transaction content

Transaction components:

  • Start - SDA line transitions from a high logic level to a low logic level while the SCL line is high.
  • Address Frame - master indicates the slave to which the transaction is being sent
  • Read/Write Bit - bit that indicates if the master is sending (low voltage level) or receiving (high voltage level) data from slave.
  • Data Frame - 8-bit data passed from master to slave or vice versa, starting with the most significant bit first (MSB)
  • ACK/NACK Bit - the ACK bit is returned from the receiving device if an address frame or data frame is received.
  • Stop - SDA line transitions from a low logic level to a high logic level while the SCL line is high.

Hardware Configuration

Figure 3. shows the hardware connection between M2K board and EVAL-ADICUP360 + EVAL-ADT7420-PMDZ.

Figure 3. I2C Debug Hardware Setup

The I2C pins are available for monitoring at port PWMH of the EVAL-ADICUP360.

EVAL-ADICUP360 I2C pin configuration: Port PWMH:

  • Pin9 - SDA
  • Pin10 - SCL

Port POWER:

  • Pin6 - DGND

M2K I2C pin configuration:

  • DIO0 - SCL
  • DIO1 - SDA

Connect the M2K pins to the EVAL-ADICUP360 as follows:

  • Pin9 - DIO1
  • Pin10 - DIO0
  • GND - DGND

Scopy Logic Analyzer Configuration

Open the Logic Analyzer instrument, select DIO0-DIO1 lines and press the “Group with selected” button.

Figure 3. I2C Group Channels

Select the channel group formed and apply the I2C decoder. While the group is selected, open settings menu by pressing the button on the top right side of the user interface. A settings panel will appear for the I2C decoder, allowing the signal-channel configuration and parameters setup.

Figure 4. Group Settings

The Logic Analyzer must be set up to “catch” the I2C transfer on the Logic Analyzer plot. Therefore we need to configure a trigger. Since the I2C transfer starts with a falling edge on the SDA signal, this event can be used as the trigger.

Figure 5. Trigger Settings

I2C Transfer Example

This example verifies that for a given software command, the correct transactions are transferred over I2C between master (EVAL-ADICUP360) and slave (EVAL-ADT7420-PMDZ).

The default I2C device address for EVAL-ADT7420-PMDZ is 0x48.

Read ID Register

Set the Time Base of the Logic Analyzer instrument to 50us and the Trigger Position at 200us and run a Single sweep.

Figure 6. General Settings

The Logic Analyzer will wait for the falling edge of the SDA signal to be triggered.

Run the “ADT7420_Read_One_Reg (ID_REG)” function. This will initiate the I2C transfer.

The result is presented in Figure 7.

Figure 7. I2C Read ID Register

Analyzing the plot, the fist half of the transaction contains a write sequence composed of the device address (0x48) with the R/W bit set low (write) followed by the address of the ID register. The master then issues a repeat-start condition for the second half of the transaction - the device address is re-sent with the R/W bit set high(read), and the byte of data containing the contents of the ID register (0xCB) is read out.

Read Temperature

Set the Time Base of the Logic Analyzer instrument to 75us and the Trigger Position at 250us and run a Single sweep.

The Logic Analyzer will wait for the falling edge of the SDA signal to be triggered.

Run the “ADT7420_Read_Temp()” function. This will initiate the I2C transfer.

The result is presented in Figure 8.

Figure 8. I2C Read Temperature

Analyzing the plot, the fist half of the transaction contains a write sequence composed of the device address (0x48) with the R/W bit set low (write) followed by the address of the temperature value MSB register. The master then issues a repeat-start condition for the second half of the transaction - the device address is re-sent with the R/W bit set high(read), and two bytes of data representing content of the temperature value most significant byte (0x0E) and temperature value least significant byte (0xE8). This illustrates the fact that the address pointer in the ADT7420 automatically increments as the master reads out data bytes.

Conclusion

In addition to I2C, the application includes a set of decoders covering a large number of communication protocols such as SPI, I2S, UART, JTAG, and others, making ADALM2000 a powerful tool for analyzing and debugging digital signals.

Further Reading:

university/courses/electronics/m2k-i2c-debug.txt · Last modified: 03 Jan 2021 22:12 by Robin Getz